STM32 MCUs

I have an End_Node application that runs on the STM32WL55 but is not running correctly on the STM32WLE55. The code downloads and starts in the STM32WLE55 but it will not Join the gateway.  I took a preliminary look the RF spectrum and it looks slightly different on the STM32WLE55 vs the STM32WL55.  The firmware is set for USA915. Thanks for help.

In RM0366 Reference Manual GPIO section it says that there is a BRR register at offset 0x28 but in the GPIO register map its not shown. I assume this is a mistake but I want to know if STM32F301C8 has a BRR register. 

When downloading firmware via IAR Embedded Workbench to an STM32H563RGT6, a flash verification error occurs **exclusively** when the write target is configured to program**Bank 2** (`0x0808'0000 - 0x080F'FFFF`) via a custom `.board` and ‘.icf’ file override. The exact sameproject, when writing to Bank 1 (`0x0800'0000`, default configuration without override),**never** shows this error If I load the firmware onto the blank flash, I have no problems. But if I make a change and reload the modified firmware, I have the following problem (IAR Debug Log):Tue Aug 25, 2026 15:28:23: Hardware reset with strategy 0 was performedTue Aug 25, 2026 15:28:23: Verification error at 0x80a'3e3c: mem = 0x04, file = 0x06Tue Aug 25, 2026 15:28:23: Download completed but verification failed. The memory cell where the error occurs changes depending on where the firmware was modified.The only way to continue debugging is to erase the flash and load the firmware. 

Hello!I a new in this.I have two sets of DA files: for password access and for access via certificate.I've tried to flash a NS-firmware, provision a password.obk, then change Product state to Provisioned/closed. Thas was successful. I can perform a regression from this state.But i also tried to open a debug session. Without success. CubeProgrammer says, that I am able to make full regression only, while Cube IDE asks for certificate DA.I know, that certificate auth method is valid with TZEN=1 only, but I tried to provision that obk with TZEN=0.As a result, I Have this:The default ST password from CubeProgrammer's folder is not working,I tried to provide all-zeros and all-FF password without success.But maybe I need to change something in the header. Or change a password length.So, 3 questions:1. Is this device totally bricked, or I can some-how calculate a password.bin2. How to perform debug in closed product state on STM32H563 if TZEN=0 ?3. How to perform debug of the the secured

I am having trouble generating an HSO based project.  I have already confirmed the board works with “Observer+PLL”.  When switching to HSO I am able to select it in the drop down, at which point it:1. Resets my current sense gain (should be 50), I have no issues replacing this value.2.  Under Speed Sensing I am provided with an empty Current Scale box, which is a “required field” however upon entering a value it remains red and tells me I cannot enter a value, as “no value is allowed”. Is this a bug or have I configured something incorrectly?  It also seems odd that the current gain setting is cleared, although I can edit that without issue.  

Hello ST Community,I am working with STM32WB05 in a custom PCB (new design) and it does not run when power on the PCB. To run it, I have to reset by reset line. If I am debugging, I neither have problem.I had used others microcontroller before (STM32L1, STM32WL55...) and it had never happend. I have check the pollowing points:1-  Power supply. I am using a externa battery with 3-3,5Volts.2- BOOT pin: I think that the problem is the STM32WB05 enter in boot mode but in the datasheet, I can not see any pin to enter it.I have tried to join PA10 to GND by 10K resistor (I see in nucleo manual UM3343 that BOOT0 pin is PA10) but that no work.3-  Clock source: I am using interna clock HSE4- reset line is always high level Any confirmation or guidance would be greatly appreciated.Thank you for your support.

Hello,I would like to test the USB Host hardware functionality of my STM32U5G9J-DK2 board.For the software, I used the official ST example without any modification:STM32CubeU5/Projects/STM32U5G9J-DK2/Applications/USBX/Ux_Host_HUB_HID_MSCI performed two separate hardware tests: CN2 + USB-C to USB-A female adapter + USB mouse/dongle. CN2 + externally powered USB HUB. With the USB-C to USB-A adapter, LD5 does not turn on and the USB device is not detected.With the externally powered USB HUB, LD5 turns on, but the HUB is still not detected.In both cases, the application remains at:USB Host library started.Starting HUB ApplicationConnect your HUB DeviceI would like to confirm if these hardware tests are correct for checking the USB Host functionality of the STM32U5G9J-DK2.Thank you.

I have a motor whose phase resistance is 40 mΩ at 20 °C and 45 mΩ at 70 °C. When I set the phase‑resistance parameter to 40 mΩ, the motor operates normally at around 20 °C. However, when the motor temperature rises to approximately 50 °C, frequent start‑up failures occur. How can this problem be resolved?

Hi everyone,I am facing a bizarre issue with an STM32F407 running a custom PCB. I am trying to put the MCU into STOP mode (Low Power Regulator ON), but it seems to enter deep sleep for a fraction of a second (current drops to almost 0mA) and then immediately wakes up/resets, stabilizing at a constant 9.8mA.I am programming via DFU and using a custom bootloader that jumps to the main application at 0x08010000.Here is what I have already done in my "Deep Sleep Test" routine to isolate the issue: Hardware Isolation: All external peripherals (W25Q Flash, FRAM, LDOs) are completely disconnected or powered down. The 3.3V line is isolated. GPIOs: All GPIOs are set to GPIO_MODE_ANALOG, except for specific pull-up/pull-down pins strictly required by the hardware. USB PHY: I am explicitly disabling the internal USB transceiver using USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_PWRDWN; and then disabling the clock. Interrupts & SysTick: I disable SysTick->CTRL = 0, clear SCB->ICSR, mask

Dear Team, We are currently working on a project based on the STM32N657X0H3Q MCU. As part of our design, we are planning to use a QSPI Flash and SDRAM instead of the OctoSPI Flash and HexaSPI PSRAM used in the reference designs. Could you please share any reference schematics, application notes, or design examples that demonstrate the integration of QSPI Flash and SDRAM with the STM32N657X0H3Q? Additionally, our design is highly space-constrained. If anyone has a reference for a minimal power supply/regulator design for the STM32N657X0H3Q, we would greatly appreciate it if you could share that as well. We look forward to your response and guidance. Thank you for your support. Best Regards, Ajnas C

  Hi Team   Am working on a custom hardware design using the STM32H745IIT6 microcontroller and interfacing it with an external SDRAM   IS42S83200J-7TLI.  Any available reference designs, including: Schematic diagrams PCB layout design files  Application notes or design guidelines specific to STM32H7 FMC/SDRAM interface If anyone has experience with a similar configuration or can share reference projects, evaluation boards, or design tipsespecially related to signal integrity, routing, or SDRAM timing configurationit would be very helpful. Regards, Sathiya    

I am using NUCLEO-F303RE board. I couldn't find ES and E marking in the product information of the datasheet. Does it mean it is not "ES" and "E" marked. can any one please confirm it.

I designed a board with a layout that I was very happy with, but this meant remapping FDCAN1_TX to PC14, which CubeMX dutifully created code for... However, the code wouldn't compile.  I needed to get my board order in that day so I simply adjusted the pin arrangement and modified the layout, but it looks for all the world as though there are some missing defines.  I say this because the datasheet quite clearly states this as a valid remapping. Just thought I'd put this out there. Maybe the fix is as simple as:-#define GPIO_AF13_FDCAN1 13 I may revisit this in the near future and I am aware there are some other remapping issues others have tripped up on.  I guess it's because this is a relatively new part.  It only came out in Feb 2025. Does anybody else know anything about this issue?

Hello, I cloned the repository https://github.com/STMicroelectronics/STM32CubeF3.git but importing the project ...STM32F3-DiscoveryExamplesBSP some code is missing in particular the code to manage the BSP device on the STM32F3DISCOVERY BOARD. What I am missing? Thanks in advance Adriano

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hi everyone,I am checking the STM32N6 series package options and I would like to confirm one point.Does the 66 mm package of the STM32N6 series expose the pins required to use the SDMMC controller?I understand that SDMMC support may depend not only on the MCU series, but also on the specific package and pin availability. I have seen SDMMC listed in the device features, but I am not sure whether it is actually usable on the 66 mm package.Specifically, I would like to know:Is SDMMC available on the STM32N6 66 mm package? If yes, does it support a practical SD/eMMC interface, such as 4-bit mode? Are there any package or pin-mux limitations I should be aware of?Any confirmation from someone who has checked the datasheet/pinout or used this package would be appreciated.Thanks!

Hello everyone, may I ask what is the maximum clock frequency supported when the STM32H7's FMC peripheral controls SDRAM? Can it work stably if the frequency exceeds 200MHz, for example, 240MHz?     Thank you very much.?

Could you please share the schematic file/pdf for STM32H753ZI nucleo board .. or reference link 

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hello,I am designing a system that must continuously capture data from a 30 MSPS, 16?bit parallel ADC into a 16?bit SDRAM using a circular buffer.The DCMI peripheral is not suitable for this parallel ADC interface because no VSYNC or HSYNC signals are availableonly the ADC clock is provided. Consequently, the most appropriate peripheral appears to be the PSSI (Parallel Synchronous Slave Interface).I would prefer to use an STM32H7 series MCU running at 550 MHz. To my knowledge, the models that integrate both an SDRAM?capable FMC and a PSSI peripheral are the STM32H723, STM32H725, STM32H730, and STM32H735.A standard 16?bit SDRAM with 13 address lines and 4 banks requires 39 control signals when including FMC_NBL0 and FMC_NBL1 for the byte enables. The 16?bit ADC supplies 17 signals (16 data lines plus a clock). The total pin count is therefore

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Dear ST Support Team,I am working on a reliability calculation for an industrial hardware design. I need the official failure rate data for the following components: STM32F405RGT6: FIT rates or MTBF, and failure mode or FMECA report. STM32H743VGT6:  FIT rates or MTBF, and failure mode or FMECA report. Could you please provide the available documentation for these parts?Best regards,

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.Hello,rather simple issue I have, I am trying to figure out the connection between the actual port naming on my board and the GPIOs defined within Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h for example. I cant find the reference, where are PB7 or PB6  on my board if I want to connect these to some other module through  wiring:(

Hi, I have a problem configuring SPI3 on a NUCLEO-H7S3L8 board. Im writing directly to registers and not using any ready-made functions. I configured SPI3 and everything works correctly as long as I use PB4 as MISO. However, I wanted to use PC11 instead, and then I only read 0xFF. Im using exactly the same settings for PC11 as for PB4, and both are configured with AF6. My question is: does PC11 require any special configuration, or maybe something on the Nucleo board blocks it from being used this way?

What are the differences between those two devices? The datasheet only says that the N means "N product version". In the STMicroelectronics eStore, the only difference is that there's a Material Declaration for the STM32C071RBT6, but not for the STM32C071RBT6N. And the STM32C071RBT6 is slightly cheaper.

We are using STM32H743 and STM32H745 in our product lines and embedded bootloader is used for boot loading. The PB14 pins is used as Debug Uart on USART1.  The PA9 pin is left unconnected. Its Not Connected pin. Is there any impact on this upgrade.  The ST Application notes says that in V9.2, the same data output issue on V9.1 is fixed. Since PA9 is not used in schematics, there is no impact on this upgrade. This is my preliminary assessment. Anybody please confirm if my understating is correct.  Thanks in advance  

Hi all, I'm developing a board based on the STM32H755ZIT3 LQFP144 MCU, and I'm studying the Nucleo-144 board to understand the best routing practices. By extracting the PCB and schematic libraries for this component from the original ST project, I found something I can't quite explain: the four 45-degree slanted pads at the corners. They are not connected to any net, and when routing the top layer they split the top ground plane into that unpleasant hourglass-shaped area interrupted by the pads marked as 0, as you can see in the attached screenshot. Could their purpose be to avoid ground loops? Since this chip has no exposed pad, it doesn't seem to be related to thermal relief or mechanical stress. I don't think they are there to solve clearance or parasitic capacitance issues either, because the polygon already stays quite close to the corner pads. I also noticed that no other libraries I found, such as UltraLibrarian or SamacSys, use those pads. From what I can see, only ST routes th

This account only shares restored community content posted by members between May 22 and June 9, 2026, who did not register for the new community.In the STM32H753xI(MCU) datasheet(https://www.st.com/resource/en/datasheet/stm32h753vi.pdf) the pins PI2, PI3 provide the functionality for SPI2_MISO and SPI2_MOSI respectively. But in the STM32H7-MB1246- E03 EVAL  board schematic(https://www.st.com/resource/en/schematic_pack/mb1246-h753-e03_schematic.pdf) the above pins are mapped to netlabels D26 and D27 respectively which are mapped to the SDRAM. Can I use the SPI functionality using these pins in the STM32H7-MB1246- E03 EVAL board?When a pin is assigned as an alternate function does it mean that the pin is directly connected to that paritcular net( in this case D26 and D27) by default in the EVAL board? Or is the external connector in the EVAL board directly connected to the GPIO(PI2, PI3)?(This image is from the user manual:(https://www.st.com/resource/en/user_manual/um2198-evaluation-bo