What parts of the DDR can I reserve using device tree without upsetting U-Boot?
I've been trying to build-time reserve a 64KiB memory region anywhere between 0xC0000000 & 0xDFFFFFFF for the Cortex-M4 core using a device tree reserved-memory node. I've tried 0xC0000000, 0xD0000000 & 0xDFFF0000 but each time U-Boot fails either du...