GPIO Trouble on STM32 F767ZI

[akash_praan]

I used a Nucleo F767ZI dev board to check and write firmware
(The IC on the board is STM32F767ZIT6U with the other characters being AA 254 VQ Z on first line and TWN AA 341 on line 2),
when I use HSI clock I am able to operate PD7, PG9, PG10, PG11, PG12 as an input or output GPIOBut on the custom developed board (the IC on the board is STM32F767ZIT6 with the other characters being AA108 VQ on the first line and TWN AA 334 on line two)

In this custom developed board while I am able to Program and debug the board and I am able to use all other pins except PD7, PG9, PG10, PG11, PG121)

1)The DC resistance of each of the above mentioned Pin and VCC(3V3) is infinite and same is with GND is also infinite
2) When I configure any of these Pins as GPIO Output as PUSH PULL and low speed mode then I see when I set the GPIO I see as the ODR setting but when I measure the voltage on the connecter(nothing between the connecter and the MCU Pin and tack length is less than 5 cms) i see 0.5 to 0.6V
3) When I configure any of these pins as Input with no Internal Pull or Pull Down, I see that these pins are not affected by noise where as other working pins are and if I connected 3V3 from a jumper cable to read input as logic High even that fails other than these 5 pins all other pins are working as expected.

Please help to debug the issue.

[Chris21 · Accepted solution]

This seems very likely to be involved:

"The VDDSDMMC is an independent power supply for SDMMC2 peripheral IOs (PD6, PD7,
PG9..12). It can be connected either to V DD or an external independent power supply."

[akash_praan]

https://www.st.com/en/microcontrollers-microprocessors/stm32f767zi.html
@Richard Li 
According to datasheet section 3.17, as per my understanding that needs to be done only when SDMMC i being used, but I will try connecting to 3.3V and then try it as all the mentioned pins which are not working have SDMMC as Alternate functions available. 

Thank you for you suggestion. 

@all please help me if my understanding is incorrect.

[akash_praan]

Hello. 

Thank you for the prompt response. I will try this out first thing in the morning. 

Regards, 
Akash

[Chris21]

The RM says,

"In operating mode phase, VDDSDMMC could be lower or higher than VDD: the
associated GPIOs (PD6, PD7, PG9..12) powered by VDDSDMMC are operating between
VDDSDMMC_MIN and VDDSDMMC_MAX. If VDDSDMMC = VDD, the associated GPIOs
powered by VDDSDMMC are operating between VDD_MIN and VDD_MAX."

I don't think the pins can work as GPIO either with no supply to VDDSDMMC.

[akash_praan]

Sure, I will try this out in the office in another 10 hours and see what the result. Most likely this should be it. 

Thank you for pointing this out. 

Regards,
Akash Rao

[Richard Li]

Beside the VDDSDMMC float, I don't understand why measure resistance for GND is like floating, You may need check pin 130 GND.

[Chris21]

Another interesting observation.  Schematic only shows one VSS pin connected, ther should be 10.

[akash_praan]

Hello @Chris21, all 10 pins are connected at the top of the MCU and then given to a single VDD supply, isn't it correct?

[Chris21]

Yes, for the VDDs, but there are also the VSSs, all of them should be connected to GND.

[Chris21]