2024-06-25 06:39 AM - last edited on 2024-06-27 02:16 PM by Pavel A.
I am a fan of STM32, especially the peripheral sets offered are great. Over the years however, one type of peripheral is missing which would be a great help for many projects, this is a programmable logic cell.
Such a cell would contain elements like Flip-Flops, Look Up Tables and such that can be configured for specific functions. For instance using the LUT's, it would be possible to create all kinds of logic operations like AND, OR, XOR gates.
Using the Flip-Flops, I would be able for instance to create a clock gate, which I needed in my last project. There I needed an external clock signal to propagate to other peripherals and be able to enable/disable this. In the end I manage to create this function with a timer but this unfortunately generates something like 9 clock cycles of latency limiting the maximum frequency of the external clock signal. A basic Flip-Flop solution would probably introduce a much smaller latency.
Competing products offer this kind of functionality more and more, for instance the Microchip SAMD51 offers a Custom Logic cell which is highly programmable.
Such a peripheral would offer inputs and outputs that can be connected to other peripherals (GPIO, Timers and so on). Here I do see an issue since the Peripheral Interconnect of STM32 is not quite generic but very specific for the different types of peripheral. Another consideration would be to add so called hardware event channels to the STM32 which allow connecting almost any peripheral event output to another peripheral event input.
Well forgive me for starting to design, just adding the programmable logic would be really great for many control oriented applications.
2024-06-27 03:21 AM
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2024-06-27 07:51 AM - edited 2024-06-27 07:54 AM
> There I needed an external clock signal to propagate to other peripherals and be able to enable/disable this.
Your chip's RCC peripheral may have a "Master Clock Out" option with a configurable clock divider, which you can use to send a clock from the STM32 to other devices.
I also think even a handful of simple logic cells could reduce the BOM and board space in some cases. It's a common enough use-case to be worth considering by ST. Sometimes a CPLD is overkill, and discrete gates feel too much like the 1980s.
2024-06-27 09:29 AM
Honestly this sounds like it would be a support and tool nightmare.. notwithstanding the usefulness of the out come.
The RISC-V approach is to have the entire thing build into an FPGA, and then you just glue the IP you want/need together.
2024-06-27 09:32 AM - edited 2024-06-28 04:09 AM
> The RISC-V approach is to have the entire thing build into an FPGA, and then you just glue the IP you want/need together.
I don't follow. Is the 10-cent CH32V003 RISC-V MCU actually a 1000$ FPGA in disguise? FWIW, as the OP stated, microchip has had this in their product lines for a long time (they call it "CLC"). Also, we're talking very simple logic here, not an embedded FPGA. Just a handful of gates and no HDL whatsoever. If they added an LPBPAM scenario editor to CubeMX, this is feasible as well. It's also, arguably, a natural progression for ST. They've already added op-amps and comparators to their chips, like microchip did. Certainly you'd agree those are very useful?
2024-06-27 10:14 AM - edited 2024-06-27 10:16 AM
No, more like the GoWin FPGA's and Tang Nano 9K / 20K / 25K, w some soft-cell RISC-V, might be some fixed/hard-cell variants too.
https://wiki.sipeed.com/hardware/en/tang/tang-primer-25k/primer-25k.html
https://www.sparkfun.com/products/24511
And there are Lattice ICE40K designs (iCESugar-nano), NEORV32, etc
ST had some PLA type stuff in the parts sold to their "White-Goods" customers
I'm not saying having some means to add glue-logic is a bad idea, per se, it's just not a winning idea for the large mass-market the STM32 MCU's have done so well with.
2024-06-27 01:36 PM - edited 2024-06-27 01:38 PM
@Tesla DeLorean wrote:Honestly this sounds like it would be a support and tool nightmare..
I remember the Triscend devices:
https://antronics.co.uk/portfolio/csoc/
The tooling was, indeed, key.
And it did take a lot of support - someone had to help them: https://developer.arm.com/documentation/kan159/latest/
@Tesla DeLorean wrote:notwithstanding the usefulness of the out come.
I found it really useful - being able to customise the peripheral set exactly to the application requirements.
ST used to have the Waferscale products PSD products:
https://www.eetimes.com/stmicroelectronics-buys-waferscale-integration/
Microchip have their CCL (Configurable Custom Logic) peripheral in some AVRs:
nowadays there are FPGAs available with Cortex-M (and other) cores built in - sometimes the core is "hard"; sometimes "soft" ...
2024-06-27 01:41 PM
@BarryWhit wrote:microchip has had this in their product lines for a long time (they call it "CLC").
* CCL (Configurable Custom Logic)
2024-06-27 01:43 PM
@Tesla DeLorean wrote:ST had some PLA type stuff in the parts sold to their "White-Goods" customers
Are you thinking of the ex-Waferscale PSDs?
Apparently that didn't work out for ST - as they canned the product line
2024-06-27 02:09 PM
There was Actel SmartFusion too, and that got swallowed up by Microchip..
I'm not denying it could be very useful, but the problem is finding the ideal fit, nobody is going to be satisfied, either it's too limited or too complicated. It will be an end-less source of complaining. And likely a patent minefield too.
And I say this as an early adopter of PAL,GAL,PLD,GATE ARRAYS (NEC & TOSHIBA), FPGA, and being familiar with IC DESIGN, VALIDATION and TEST (PHILIPS)