NSRT_MODE and IRHEN option bytes are not configurable.

[CTapp.1]

I'm using V.2.16.0 to set the option bytes for the STM32G031, but NRST_MODE and IRHEN are not showing in the OB section.

There is a report for the same issue for the STM32G030 with the accepted solution being that the G030 does not officially support these options. However, that is not the case for the G031 as the options are documented in §3.7.8 of the reference manual.

[Amine_Jridi]

Hi @CTapp.1 

I found the NRST_MODE and IRHEN options in the OB section for the STM32G031.

Could you send me an OB dump? you can use the following command with CLI: 

>STM32_Programmer_CLI -c port=<Portname> -ob displ

Thanks.

[CTapp.1]

Sure:

      -------------------------------------------------------------------
                        STM32CubeProgrammer v2.16.0                  
      -------------------------------------------------------------------

ST-LINK SN  : 37FF680630484B3851221443
ST-LINK FW  : V2J45S7
Board       : --
Voltage     : 3.57V
SWD freq    : 4000 KHz
Connect mode: Normal
Reset mode  : Software reset
Device ID   : 0x466
Revision ID : Rev Y
Device name : STM32G03x/STM32G04x
Flash size  : 16 KBytes
Start Address : 8000000
Device type : MCU
Device CPU  : Cortex-M0+
BL Version  : 0x54


UPLOADING OPTION BYTES DATA ...

  Bank          : 0x00
  Address       : 0x40022020
  Size          : 108 Bytes

[==================================================] 100% 

  Bank          : 0x01
  Address       : 0x40022080
  Size          : 4 Bytes

[==================================================] 100% 


OPTION BYTES BANK: 0

   Read Out Protection:

     RDP          : 0xAA (Level 0, no protection) 

   User Configuration:

     nRST_STOP    : 0x1 (No reset generated when entering Stop mode) 
     nRST_STDBY   : 0x1 (No reset generated when entering Standby mode) 
     IWDG_SW      : 0x1 (Software independent watchdog) 
     IWDG_STOP    : 0x1 (IWDG counter active in stop mode) 
     IWDG_STDBY   : 0x1 (IWDG counter active in standby mode) 
     WWDG_SW      : 0x1 (Software window watchdog) 
     RAM_PARITY_CHECK: 0x1 (SRAM parity check disable) 
     nBOOT_SEL    : 0x1 (BOOT0 signal is defined by nBOOT0 option bit) 
     nBOOT1       : 0x1 (Boot from Flash if BOOT0 = 1, otherwise system memory) 
     nBOOT0       : 0x1 (nBOOT0=1) 

   Write Protection:

     WRP1A_STRT   : 0x1F  (0x800F800) 
     WRP1A_END    : 0x0  (0x8000000) 
     WRP1B_STRT   : 0x1F  (0x800F800) 
     WRP1B_END    : 0x0  (0x8000000) 
     WRP2A_STRT   : 0x0  (0x8000000) 
     WRP2A_END    : 0x0  (0x8000000) 
     WRP2B_STRT   : 0x0  (0x8000000) 
     WRP2B_END    : 0x0  (0x8000000) 

In case it make a difference, I'm running under MacOS.

[Amine_Jridi · Accepted solution]

Hi @CTapp.1 

Thank you for providing the Option Byte dump. Upon review, it has become clear that the differences in
the available options are attributed to the particular part number of the STM32G0 you are using which has 16K flash memory.
I have opened an internal ticket (Ticket ID: 181058) with our dev team to further investigate this matter.

I appreciate your patience and cooperation as we address this issue.

Amine.