hello community of STM, I want to perform a simple lwip ethernet ping test using the raw api without RTOS on STM32H743ZI2 Nucleo Board but so far I haven't met with any success. Can I please be provided with some support?

[MMish.1]

I have used stm32cubeMX and atollic truestudio in this case. I'm attaching my project folder which contains the ioc file and the code files. I would be highly obliged if anyone can tell me the mistakes in either the cubeMX settings or the code or both.

BR

MANASKANT MISHRA

[Pavel A.]

I'd advise to start from the examples unmodified.

Most LwIP examples in the Cube repository work on STM32H743ZI2 Nucleo as is.

Including tcp and udp echo servers, and ping works too.

Of course, note (or change) the IP addresses hard coded there, or use DHCP.

Then see this discussion.

Good luck!

-- pa

[MMish.1]

Hello Pavel,

I have already followed the discussion you've mentioned above, yet none of the suggestions seem to work for me. I have already successfully tested the ethernet lwip raw api for an F4 board but am failing in case of H7. Thats the reason I had to re-post this and I would be glad if you or any other community member/ST employee can review my code and cubeMX settings and tell me as to where I'm going wrong.

BR

MANASKANT MISHRA

[ms1802]

Hi,

One of the real gotchas is to do with the MPU cache/buffering. Without this, everything seems right but nothing happens.

You'll need to do something like my code below (it works for me ). This code (.xml etc) is for Crossworks, but these links will also help.

https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices

https://community.st.com/s/article/FAQ-Ethernet-not-working-on-STM32H7x3

Also take a look at the LWIP examples in the libraries wrt all this.

//declare the LWIP memory - this needs to be defined at specific address and have the

//memory configured properly. see MPU_Config()

//

char LWIPMemory[LWIP_MEM_ALIGN_SIZE(MEM_SIZE)] __attribute__((section(".LWIP_RAM")));

//configure memory for ethernet.

//see

//https://community.st.com/s/article/FAQ-DMA-is-not-working-on-STM32H7-devices

//https://community.st.com/s/article/FAQ-Ethernet-not-working-on-STM32H7x3

// config to match the settings in MemoryMap.xml / flashPlamcement.xml

// ie

// <MemorySegment start="0x30040000" name="SRAM3_EthTxRx" size="0x100" />

// <MemorySegment start="0x30040100" name="SRAM3_NonCache" size="0x100" />

// <MemorySegment start="0x30040200" name="SRAM3_EthArray" size="0x3E00" />

// <MemorySegment start="0x30044000" name="SRAM3_LWIPHeap" size="0x4000" />

//

//AND see

//LWIPMemmory[] at top of this file

//LWIP_RAM_HEAP_POINTER in lwipopts.h

void MPU_Config(void)

{

   MPU_Region_InitTypeDef MPU_InitStruct;

   HAL_MPU_Disable();

   //Initializes and configures the Region and the memory to be protected

   //the region 0x30040000 to 0x300403FF that is non chacheable for DMA and Ethernet Tx/RX

   //

   MPU_InitStruct.Enable = MPU_REGION_ENABLE;

   MPU_InitStruct.Number = MPU_REGION_NUMBER2;

   MPU_InitStruct.BaseAddress = 0x30040000;

   MPU_InitStruct.Size = MPU_REGION_SIZE_512B;//MPU_REGION_SIZE_256B;

   MPU_InitStruct.SubRegionDisable = 0x0;

   MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

   MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;

   MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;

   MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;

   MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;

   MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;

   HAL_MPU_ConfigRegion(&MPU_InitStruct);

   //LWIP heap

   MPU_InitStruct.Enable = MPU_REGION_ENABLE;

   MPU_InitStruct.Number = MPU_REGION_NUMBER1;

   MPU_InitStruct.BaseAddress = 0x30044000;

   MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;

   MPU_InitStruct.SubRegionDisable = 0x0;

   MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

   MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;

   MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;

   MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;

   MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;

   MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

   HAL_MPU_ConfigRegion(&MPU_InitStruct);

   //the region 0x30040000 to 0x30043FFF that is non chacheable for DMA and Ethernet Tx/RX/array

   //TODO does this supersede the first entry above?

   //

   MPU_InitStruct.Enable = MPU_REGION_ENABLE;

   MPU_InitStruct.Number = MPU_REGION_NUMBER0;

   MPU_InitStruct.BaseAddress = 0x30040000;

   MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;

   MPU_InitStruct.SubRegionDisable = 0x0;

   MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;

   MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;

   MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;

   MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;

   MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;

   MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

   HAL_MPU_ConfigRegion(&MPU_InitStruct);

   HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);

}

Cheers

Mark

[MMish.1 · Accepted solution]

hello Mark,

I was successful in doing the ethernet ping test using the stm32h743zi2 nucleo board. You are right about the MPU config settings but thats not all. There are certain changes to be made in the linker descriptor file "stm32h743zitx_flash.ld". There are two places in that file where I had to replace DTCMRAM with RAM D1 and another place where I had to replace DTCMRAM with RAM D2. These settings are related to the warning in cube MX "ETH" settings which says that "ETH won't work until RAM points to 0x24000000 location" which happens to be the starting address of RAM D1. The DMA addresses for ethernet Rx and Tx have their memory in RAM D2 whose address starts at 0x30000000. These are the extra changes that need to be made for stm32h743zitx controller. These extra changes aren't needed in case of stm32f4 and f7 boards. Thanks for the support anyways.

BR

MANASKANT