Clarification requires on STM32MP157 timer peripheral clocks enable region
Hello We are using timer peripheral in STM32MP157 Cortex -A7 core 0 processor. In this, we enabled TIM2, TIM3, TIM4 in RCC APB1 peripheral enable for MPU set register, now we unable to use these timers (not getting interrupts) in Cortex -A7 core...