Ask questions and find answers on STM32 microprocessors, including hardware, power, DRAM, flashing, interfacing, device tree, and peripherals.
Hey,As a hardware engineer, I worked for a long time with the M7 controller.For a Specific Algorithm, It seems like I should use a stronger core then the M7 480Mhz, when the purpose is to Calculate in Real-time.one of the options is to use the MP153/...
I want to use remoteproc to load and start firmware on Coretex-M4 from Cortex-A7.I refer to the following Wiki page.https://wiki.st.com/stm32mpu/wiki/Linux_remoteproc_framework_overviewIn above Wiki page, I have tried [4.1.1 Remote processor boot thr...
Using the ST provided altium design files for the STM32MP157A-DK1, I've run the design rule check on the PCB as default which shows about 400 violations. Are the design rules set up correctly for this project or am I doing something incorrectly? I'd ...
Hi, I'm trying to build a Yocto-Linux for an specific STM32MP157 board. I was working with "thud", but now "dunfell" is required, as it is supposed to be long term stable.The system is built after ST's manual:https://wiki.st.com/stm32mpu/wiki/How_to_...
I want to know how to specify the address to load Cortex-M4 firmware when U-Boot or Linux Kernel load the firmware of Cortex-M4 in Retention RAM.And, how to specify the address to load Cortex-M4 firmware if I load the firmware of Cortex-M4 in Retent...
want to exchange large data buffers with the coprocessor.I have done following wiki page.https://wiki.st.com/stm32mpu-ecosystem-v1/wiki/How_to_exchange_large_data_buffers_with_the_coprocessor_-_example#Source_codeI want to analyze Cortex-M4 source ...
Trying to run some test code on the M4 core of a custom stm32mp151a board and can't seem to get far. I have been successful in getting u-boot working on the A core, so the majority of the board has been proven functional.I will attach my make file as...
I'm looking for CAD symbols and footprint for STM32MP15x in LFBGA-354 package. Could you guys help me on this? Thank you.
I want to implement the program that exchange large data with each other on Cortex-A7 and Cortex-M4 by using DDR.Thanks to following wiki page, I have understand the mechanism that exchange large data from Cortex-M4 to Cortex-A7 by using DDR.https...
Hi,Can I access APB5 bus in engineering mode to run I2C4 with I2C4_SCL = PZ4, I2C4_SCL = PZ5?
