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Machilus · 2021-01-21

Hi ST.I set the clock in the dts file as below.&rcc { st,hsi-cal; st,csi-cal; st,cal-sec = <60>; st,clksrc = < CLK_MPU_PLL1P CLK_AXI_PLL2P CLK_MCU_PLL3P CLK_PLL12_HSE CLK_PLL3_HSE CLK_PLL4_HSE CLK_RTC_LSE CLK_MCO1_DISABLED CLK_MCO2_DISABLED >; st,clk...

Machilus · 2021-01-06

Hi STI have a question when setting the ADC Clock on the M4 Core side.The STM32MP151C datasheet states that the ADC Clock can be set up to 36Mhz.When the AHB clock is 200Mhz, what clock will it work with if I set "ADC ClockPrescaler" to "ADC_CLOCK_SY...

Machilus · 2020-11-19

Hi STI enabled DISTRO_FEATURES_append = "tpm2" in the file ".../layers/meta-st/meta-st-openstlinux/conf/distro/include/openstlinux.inc" as described in the ST Wiki.When building with "st-image-weston" I get the following error message:ERROR: Nothing ...

Machilus · 2020-11-18

Hi AllWhen building "Eco system V2.1.0" distribution of Custom Board based on STM32MP151C chip, there is a problem that devicetree symbolic link is not created.Symbolic link of custom board devicetree is not created in "tmp-glibc/work-shared/stm32mp1...

Machilus · 2020-11-08

Hi AllIf you create a distribution with RTL8723BU enabled in the Linux kernel and boot, you will see the error message below.[ 30.102790] usb 2-1.2: 1f8: ff ff ff ff ff ff ff ff[ 30.106213] usb 2-1.2: RTL8723BU rev E (SMIC) 1T1R, TX queues 3, WiF...

Machilus · 2021-02-08

Hi OlivierK (ST Employee)In the picture above, you can see that "spi5_k" is set to 66Mhz in "PLL4Q".Since the clock setting of "PLL4" is as follows, it is normal that 66Mhz appears in "PLL4Q"./* VCO = 792.0 MHz => P = 99, Q = 66, R = 72 */pll4: st,pl...

Machilus · 2021-02-07

Hi OlivierK (ST Employee)I entered the same frequency settings into the STM32CubeMX as the shared DTS file, but there are no errors.If I set "/6" in DIVM4, CubeMX will not throw an error if the condition of "400Mhz =< PLL4 <= 800Mhz" is met.So settin...

Machilus · 2021-01-25

Hi OlivierK (ST Employee)Please tell me the e-mail address to send dts and ioc files.RegardsMachilus

Machilus · 2021-01-25

Hi PatrickF (ST Employee)I modified DTS and Firware by referring to the advice.I looked at it using the command "cat /sys/kernel/debug/clk/clk_summary" and spi5_k was assigned to "pll4_q".But didn't solve the problem.If you set "PCLK2", "HSI", "CSI"...

Machilus · 2020-11-22

Hi ArmandG (ST Employee)Thank you for answerI solved the problem in a different way.I applied the "meta-security" layer for dunfell from the yocto git site.Actually, even if I built with bitbake, downloaded it to the custom board, and used the tpm2 ...

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Questions about setting the spi clock (devicetree file, M4 Core side)

Questions about setting the ADC clock on the M4 core side

How to include TPM2 package when making "Eco system V2.1.0" distribution?

Devicetree symbolic link related problem when building "Eco system V2.1.0" distribution

How to use the RTL8723BU in "Ecosystem V2.0.0"?

Re: Questions about setting the spi clock (devicetree file, M4 Core side)

Re: Questions about setting the spi clock (devicetree file, M4 Core side)

Re: Questions about setting the spi clock (devicetree file, M4 Core side)

Re: Questions about setting the spi clock (devicetree file, M4 Core side)

Re: How to include TPM2 package when making "Eco system V2.1.0" distribution?