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Failed to access ROM Table of CortexM4 while debugging in engineering mode. What are the reasons ? See description below.

Product: STM32MP153CAA3we are trying to debug the Cortex M4 over the SWD Interface. The setup of the Bank0,1,2 is configured correct (Engineering Mode) . During the analysis of SWD we see that Debugger fails to access ROM Table (Address: 0xE00FFFE4, ...

WSief.1 by Associate II
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LCD not interpreting colors correctly using LTDC connected to STM32MP157F based custom board.

We have a custom board based on STM32MP157 MPU and running AOSP, with AUO G101EVN010 LCD-TFT panel using an LVDS to LTDC converter for interface.Setup of the system is done using the STM32MP1 distribution for Android. I am able to get the panel to di...

_legacyfs_online_stmicro_images_0693W00000bkDBHQA2.png _legacyfs_online_stmicro_images_0693W00000bkDDDQA2.png
SRaic.1 by Associate II
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Resolved! Configuring and reading "GPIO Analog"

Using the STM32MP157 development kit, I have configured two "GPIO Analog" lines that are exposed through CN13 (pins 1 and 2).I am trying to set these up as such. From going down the rabbit trail of documentation:https://wiki.st.com/stm32mpu/wiki/GPI...

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What is the current state of Resource manager for coprocessing? Why is it not part of mainline kernel and is it planned to add it?

We are using ST32MP153 running mainline linux on the A7 cores. And we want to use the M4 for realtime processing and output. Therefore some resources shall be used by Linux at the A7 cores. Some by the M4. If we get it right, ST's solution for that i...

STM32MP157A-EV1 boot-up with eMMC device

Hi Team,We are trying to boot the STM32MP157A-EV1 board with our eMMC device, but it is booting intermittently.As per our debugging the failure case, eMMC device will respond ACK within ~15ms but ROM code disable the CLK in ~50ms(before downloading t...

GDhan.1 by Associate II
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