@Community member's suggestion of using 2 timers is a cleaner solution, specially if you can choose 2 timers that share a common trigger source so there is no software delay between the 2 timers starting.
However, it is possible to do this using a single timer, though the code is much more involved. Configure the timer as a normal up counter with ARR=0xffff (or 0xffff ffff for a 32 bit timer). Channel 1 and 2 are configured as output compare "toggle" mode. Starting with timer not running, and timer's CNT == 0, Intiialize each channel's CCR to "1/2 of pulse period" of that channels signal, and enable the "output compare" interrupt for both channels. Start the timer. In the interrupt handler, check to see which channel caused the interrupt (might be both, so be ware), then update that channel's CCR = (old CCR value) + (1/2 pulse period). Continue as long as you need pulses.
This presumes that your CPU speed is high enough, and your output pulse rate low enough, that your interrupt routine can update the CCR registers before the timer's CNT reaches the next compare value. And like I said, not as clean/easy/clear as the two timer solution.
