STM32G474, [FD]CAN, Random duplicate frames on CAN bus, why?

[Julien M.]

Great ST Community,

Problem:

Why do I have random duplicate frames on the CAN bus with a STM32G474?

Context:

I am using STM32G474 ;

I am using FDCAN1 (can not try with FDCAN2) with Classical CAN frames ;

STM32Cube FW_G4 V1.4.0 ;

STM32CubeIDE 1.7.0 ;

I used these tools to configure bit times:

• https://phryniszak.github.io/stm32g-fdcan/
• http://www.bittiming.can-wiki.info/

I want 500 kBauds, from 24 MHz, so my configuration is:

• hfdcan1.Instance = FDCAN1;
• hfdcan1.Init.ClockDivider = FDCAN_CLOCK_DIV1;
• hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS;
• hfdcan1.Init.Mode = FDCAN_MODE_NORMAL;
• hfdcan1.Init.AutoRetransmission = ENABLE;
• hfdcan1.Init.TransmitPause = ENABLE;
• hfdcan1.Init.ProtocolException = DISABLE;
• hfdcan1.Init.NominalPrescaler = 3;
• hfdcan1.Init.NominalSyncJumpWidth = 2;
• hfdcan1.Init.NominalTimeSeg1 = 13;
• hfdcan1.Init.NominalTimeSeg2 = 2;
• hfdcan1.Init.DataPrescaler = 3;
• hfdcan1.Init.DataSyncJumpWidth = 2;
• hfdcan1.Init.DataTimeSeg1 = 13;
• hfdcan1.Init.DataTimeSeg2 = 2;
• hfdcan1.Init.StdFiltersNbr = 0;
• hfdcan1.Init.ExtFiltersNbr = 0;
• hfdcan1.Init.TxFifoQueueMode = FDCAN_TX_FIFO_OPERATION;

I am using a TxHeader with theses parameters:

• TxHeader1.Identifier = 220;
• TxHeader1.IdType = FDCAN_STANDARD_ID;
• TxHeader1.TxFrameType = FDCAN_DATA_FRAME;
• TxHeader1.DataLength = FDCAN_DLC_BYTES_8;
• TxHeader1.ErrorStateIndicator = FDCAN_ESI_ACTIVE;
• TxHeader1.BitRateSwitch = FDCAN_BRS_OFF;
• TxHeader1.FDFormat = FDCAN_CLASSIC_CAN;
• TxHeader1.TxEventFifoControl = FDCAN_NO_TX_EVENTS;
• TxHeader1.MessageMarker = 0;

I tried to dialog with another STM32G474 (same boards) => Problem, from both MCUs.

with a STM32F7 (so necessary CAN only and not FDCAN) => same results by STM32G4 only.

I have stub CAN bus with a charge 120 Ohms, with only 2 nodes.

I see the random duplicate frames with a logical analyzer and with an oscilloscope.

Tx signals (MCU side) are cleaned. Bus signal is cleaned too.

Example with a duplicate frame five times:

Captured with Ikalogic SP209i and find attached data. You can analyze them with ScanStudio free software tool.

After, the receiver sends another message in reaction. So the message is really received once...

Do you have an idea?

Thanks in advance!

Working ressources:

• User manuel reference for STM32G4 ;
• User manuel reference for HAL/LL STM32G4 ;
• 3 application notes for FDCAN (bootloader, etc) ;
• https://www.youtube.com/watch?v=yQsiHH5R3ZM and its PDF support document;
• STM32CubeIDE, examples for STM32G4 named "FDCAN_Classic_Frame_Networking";

[SofLit]

Hello,

If you want to use FDCAN in classic mode you have to configure it in classic format:

hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS ==> FDCAN_FRAME_CLASSIC

[Julien M.]

Hi @Community member​ 

You are right! And thanks for your answer.

But below, you can find my understanding:

From FDCAN examples provide by STM32CubeIDE to STM32G4 (and others) to send Classical CAN frames, FDCAN peripherical is set to FDCAN_FRAME_FD_BRS and the difference is done in the HAL::CAN::TxHeader.FDFormat = FDCAN_CLASSIC_CAN ; and HAL::CAN::TxHeader.BitRateSwitch = FDCAN_BRS_OFF

To summarize:

1. If you set your FDCAN peripheral to FDCAN_FRAM_FD_BRS, you can send FDCAN frames and Classical CAN frames.
2. If you set your FDCAN peripheral to FDCAN_CLASSIC_CAN, you can send only Classical CAN frames.

I tried both, but I have same results: random duplicate frames.

[SofLit]

Hello,

1- please refer to this thread for FDCAN/Classical CAN compatibility.

2- For me it's a bug in the example (internal ticket number 125428), and the parameter hfdcan1.Init.FrameFormat should be set to FDCAN_FRAME_CLASSIC. You can refer to the example provided in STM32CubeH7 under the path \STM32H743I-EVAL\Examples\FDCAN\FDCAN_Classic_Frame_Networking which I'm sure is working well. 

3- Check your HW mainly your CAN Tx path (GPIO config, wiring etc ..).

I think the random duplication is due to a non-transmitted frames and setting the parameter hfdcan1.Init.AutoRetransmission = ENABLE; will try to retransmit them ..

[Julien M.]

Hello all and @Community member​ ,

We have bought a STM32G474E-EVAL (evaluation board) and used "FDCAN_Classic_Frame_Networking" example to communicate at 500 kBauds (so need to adapt example: nominal time segments mainly) with a STM32F7 => The STM32G474 sends just once frame into the CAN bus!!!

The configuration was set to hfdcan1.Init.FrameFormat = FDCAN_FRAME_CLASSIC.

I have tried with change only hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS => No problem, we have just once frame from the STM32G474.

My intermediate conclusion is: probably hardware...

• I need to check with my custom board and with "FDCAN_Classic_Frame_Networking" program;
• With my custom board, I need to remove the Nominal Prescaler (set to 1) and adapt nominal time segments to have high values and check it;
• I need to check Rx signal (MCU side) of the custom board;

I will let you inform.

Note: I have received STM32G474E-EVAL board with the connector CN1 (I2C ext) unsoldered (bad soldered joint).

[Julien M. · Accepted solution]

Hi @Community member​  and everybody,

We have found the mystery!

In fact, regarding the MCU User Manuel (RM0440, Rev.6), Figure 662. CAN subsystem page 1944/2127 and Figure 663. FDCAN block diagram page 1947/2127,

There are 2 clock domains: APB clock and Kernel clock ; and the interface is the Sync block. But never mentioned about the good practices regarding the frequencies, the relation/proportion to have the better synchronization. Can STMicroelectronics share us any informations/details about this Sync block and good practices?

Experience in the field, when I change the APB1 clock division from /16 to /1 (from 3.6MHz to 57.6MHz) and have set FDCAN clock (Kernel clock) from HSE to 24MHz, we do not have duplicate frames!!!

But I do not know how to use it correctly (PLCK1 source? works well with 3.6MHz for 500 bauds (small Quantum Time)?...).

Thanks in advance!

Regards.

[JLoui.1]

Hi @Community member​ and @Julien MÊME​ ,

I had the same problem.

What ratio should we configure to avoid duplicate frames ? And why does it work with only some configurations ?

Thanks in advance!

Regards.

[heveskar]

I've had a similar problem with STM32H735VG. With kernel clock set to 80 MHz and APB1 clock set to 36 MHz, there were random duplicit frames on the bus. When I increased APB1 clock to 72 MHz, problem disappeared.

However, in the STM32H735 reference manual RM0468, there is this note on page 2530:

It is written in the context of clock calibration, but it is written in such a way that I suspect it must be valid even when calibration is not used.

To sum up, for STMH735, my understanding is that when kernel clock is set to 80 MHz, APB1 clock must be >= 80 MHz. Just for information if anyone else is debugging that.

Sidenote: this might be relevant: https://electronics.stackexchange.com/questions/616793/stm32-fdcan-duplicate-messages