"STM32H7 Single-Core Active Hardware Design Reference for Custom Boards"

[jr_engr_mbed]

I have chosen the STM32H743 as the custom hardware chip to manage real-time applications, including displaying analog ECG data on a 1080x600 DWIN display with CTP and using a 24V thermal printer for printing. I need reference schematics for using SDRAM, Q-SPI, and the 208 LQFP package. Can I adapt the STM32H7-EVAL schematic files for our application by following the same connections? We will implement power sources as required, such as 12V, 24V, and 3.3V for the MCU..

I noticed in the EVL-SCH that SDRAM, NOR flash, and SRAM are connected to D[0..31]. I'm unsure why they are connected this way, and I'm wondering if I need to use these memory components as they are not present on discovery boards (specifically NOR flash and SRAM)

 

[LCE]

D[n] / A[n] here are not the STM32's PORTD / PORTA, but simply the memories' data and address lines.

[SofLit · Accepted solution]

Hello,

Yes you can adapt your schematics based on 208 LQFP package on the STM32H743-EVAL schematics. The die is the same, just take care about the power supply pin number differences.

As said by @LCE A[n] and D[m] refer respectively to FMC_A[n] and FMC_D[m]. Refer to the datasheet to check the correspondence GPIO pin / FMC alternate function.

[jr_engr_mbed]

Yeah, that's great! :thumbs_up:.Thankyou for your support.. Since we have access to Altium for designing a new PCB suitable for our project, would there be any issues if we design the new PCB using the Altium sch.doc file of the H743-EVL board? Our plan is to remove the vast majority of components, except for the memory section, and replace the BGA with LQFP and QFN packages of the same memory components. Will assembling the board this way pose any problems? Please provide guidance, as we plan to proceed this week.

[SofLit]

---

Will assembling the board this way pose any problems? 

---

Not sure I understood what do you mean by this.. Technically yes you can do that but again you need to check the power VDD/GND/VCORE connections and you can use H743-EVAL Altuim sources without issues. No license, no permission needed. So go ahead ..

[Tesla DeLorean]

Seems like the wrong approach. Apt to get issues with nets, or meta-data that might be buried.

Can you just lift the symbols you need?

If you do take this approach make sure you export and double check the netlist to make sure you've not created islands connected to the wrong nets, or incorrectly named nets.

[jr_engr_mbed]

As your colleague @SofLit mentioned, adjusting VDD, GND, and decoupling capacitors according to the LQFP package is a good practice, following the application note for hardware design for H7. Additionally, by adding the same memory netlabels and using the same GPIO for external memory while removing netlabels for audio and extension connector sections.etc in the MCU 's page and removing their sheets, we can reduce the total pages needed from the EVL board to 5-6 pages only. Do you think carefully implementing these changes is achievable? I am confident in this approach, especially since I am receiving outsourcing help from an Altium PCB designer who can create a new layout using this edited version of the EVL board.

[jr_engr_mbed]

For the LQFP 208 package, you want me to check if adding additional decoupling capacitors according to VDD is what you're suggesting, correct? I think the EVL board has a 240+25 BGA, so adjusting the VDD pins is the main concern, right? The rest involves copying the same net names from the MCU BGA's GPIO pins to the LQFP pins. So, in conclusion, ensuring the bus connection with the NOR flash and SDRAM is also supported for my LQFP package, correct?

[SofLit]

For the LQFP 208 package, you want me to check if adding additional decoupling capacitors according to VDD is what you're suggesting, correct? so adjusting the VDD pins is the main concern, right?

---

That's correct. Also check the GPIO used in Eval board vs your application with LQFP208.

The rest involves copying the same net names from the MCU BGA's GPIO pins to the LQFP pins. 

---

I'm not an Altium expert. To me the die is the same so you will have the same functionality on the IOs.

---

So, in conclusion, ensuring the bus connection with the NOR flash and SDRAM is also supported for my LQFP package, correct?

---

Yes. And you need just to check the IOs differences as they are not the same package as LQFP may have less IOs.

[Tesla DeLorean]

>>Do you think carefully implementing these changes is achievable?

Sure, but it requires attention to details, for things than may be buried, hidden or obfuscated. The actions of typing things in, and cross checking them generally re-enforces the necessary due-diligence which cutting-and-pasting does not. 

Your Altium guy should be able to tell you what he's comfortable doing, and the level of responsibility he's being held too.

 1080x600 ?? You mean 1024x600 which a more common/standard display resolution.