How to transfer the AD conversion value of STM32H7 to the CPU at the fastest speed

[RIG]

Please tell me how to transfer data so that the CPU can calculate the converted values of ADC1,2,3 with STM32H725 at the fastest speed.

I recognize that there are ways to use DMA and MDMA and ways to use D-cache. Thank you.

[waclawek.jan]

Transfer data from where to where?

Generally, DMA will read out ADC and cram the data to RAM at whatever the pace ADC runs at, but then you probably need to read those data and process them and store the results somehow, which process of these are you talking about?

JW

[RIG]

Thank you for your answer.

I think that transferring directly from the ADCx-> DR (x = 1,2,3) register to D-cache can save the most time,

but I want to transfer from ADCx-> DR to D-TCM.

Could you tell me the specific method?

[waclawek.jan]

I don't use the 'H7, but AFAIK in 'H7 TCM is not accessible by DMA.

Also using DMA with cached RAM is tricky, you'd need to actively manage the given area. I'm not familiar with the details of this.

JW

[RIG]

Thank you for your reply.

[TDK]

> I think that transferring directly from the ADCx-> DR (x = 1,2,3) register to D-cache can save the most time,

The only way data gets into DCACHE is if it's in memory first. It's not an independent storage area.

The best way would be to use DMA to transfer it to memory automatically, and when complete, invalidate the cache before reading it out.

[RIG]

>The only way data gets into DCACHE is if it's in memory first. It's not an independent storage area.

-->I understand.

Thank you for answering.

>The best way would be to use DMA to transfer it to memory automatically, and when complete, invalidate the cache before reading it out.

-->Thank you very much.

   I have read various materials, but please tell me because it is not clear.

   As shown in the attached file, the ADC3 conversion value of the D3 domain is transferred to SRAM4 by BDMA, and then transferred to D-TCM by MDMA. 

   Finally, invalidate the cache and then read it from D-TCM. 

   Is that the right way to go?

[Piranha]

As I've said it many times, cache management functions must be called before passing the buffer to peripheral. That is true also for a receive buffer invalidation because otherwise cache eviction can damage those buffers by writing back dirty lines during the DMA transfer time.