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STM32G4 ADC12_Common Register cannot be written

LLOLO.1
Associate II

Hi! I am trying to set ADC pre-scaler of my STM32G431KB however no matter what I do it never changes from 0x0.

I can setup ADC1 register without a problem but when it comes to ADC12_Common register nothing seems to be configurable.

Below there is my ADC configuration code.

//-------------ADC Configuration-------------//
	ADC1->CR &= ~(ADC_CR_ADEN); //Disable ADC
	ADC12_COMMON->CCR |= (0b00<<ADC_CCR_CKMODE_Pos); //Select ADC clock Source in Peripheral
	ADC12_COMMON->CCR |= (0b1000<<ADC_CCR_PRESC_Pos); //ADC Clock divided by 32
 
	ADC1->CR &= ~(ADC_CR_DEEPPWD); //Disable ADC Deep-Power-Down mode
	ADC1->CR |= ADC_CR_ADVREGEN; //Enable ADC Voltage Regulator
	DummyDelay(10000); //Delay for ADC Voltage regulator settling
 
	ADC1->CFGR |= ADC_CFGR_CONT; //ADC continuous mode
	ADC1->CFGR &= ~(ADC_CFGR_RES); //12-bit ADC
	ADC1->SQR1 |= (0b0000 << ADC_SQR1_L_Pos) | (1 << ADC_SQR1_SQ1_Pos); // Only 1 conversion for ADC channel 1
	ADC1->DIFSEL &= ~(ADC_DIFSEL_DIFSEL_0); //Single Ended Input
 
	ADC1->CFGR2 |= (0b0001 << ADC_CFGR2_OVSS_Pos); //Over-sampling mode 1 bit shift
	ADC1->CFGR2 |= (0b001 << ADC_CFGR2_OVSR_Pos); //Over-sampling ratio x4
	ADC1->CFGR2 |= ADC_CFGR2_ROVSE; //Enable Over-sampling
 
	ADC1->CFGR |= ADC_CFGR_DMAEN | ADC_CFGR_DMACFG; //Enable DMA for ADC and DMA in Circular Mode
 
	ADC1->CR &= ~(ADC_CR_ADCALDIF); //Single Ended Mode Calibration
	ADC1->CR |= ADC_CR_ADCAL; //Start Calibration
	while(ADC1->CR & ADC_CR_ADCAL); //Wait Until Calibration Complete
 
	ADC1->ISR |= ADC_ISR_ADRDY; //Clear ADRDY Flag
	ADC1->CR |= ADC_CR_ADEN; //Enable ADC
	while(!(ADC1->ISR & ADC_ISR_ADRDY)); //Wait Until ADC Enables

Can someone tell me what I am doing wrong in line 3 and 4 of above code?

6 REPLIES 6
Bassett.David
Senior

Hello,

Beware the .svd file for the STM32G4 has the wrong address for ADC12_Common (and ADC5). If you're trying to read/write them from a debugger, it will reference to the wrong address. I've mentioned this previously, but ST has not updated...

Good luck!

Regards,

Dave

LLOLO.1
Associate II

Thank you! You are right.

LLOLO.1
Associate II

ADC12_COMMON->CCR |= (0b00<<ADC_CCR_CKMODE_Pos); //Select ADC clock Source in Peripheral

ADC12_COMMON->CCR |= (0b1000<<ADC_CCR_PRESC_Pos); //ADC Clock divided by 32

So these lines are correct right? The only issue is that I cannot see it in debugger right?

Hello,

Thank you for highlighting this.

Please find attached the new svd file for STM32G431 with the fix.

 <name>ADC12_Common</name>
 <description>Analog-to-Digital Converter</description>
 <groupName>ADC</groupName>
 <baseAddress>0x50000300</baseAddress> 

The correction (for all the G4 devices) is implemented internally and will be available in the ST web page.

Best Regards,

Imen

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Thanks
Imen

Hi!,

I think the STM32F303 has the same problem.

I don't know what debugger are you using, but you should be able to observe content on absolute addresses.

JW