STM32 MCUs

Based on discussion here, conclusion is, that given in 'L45x/'L46x there's no DAC1_CH2, and in 'L41x/'L42x no DAC at all, these are unavailable for inputs selectable for COMP for these sub-families of the low-end 'L4xx family group handled collectively by RM0394. Description in stm32l4xx_hal_comp.c does not tell these completely, and there are also references to 'L43x/'L44x having some exceptions, which based on RM/DS doesn't appear to be the case:   Also, macros in stm32l4xx_ll_comp.c don't take the missing DAC channels into account, and they should. Can these be looked at, please. Thanks, JW

I am attempting to exist from a Shutdown mode using the WKUP6 pin (PB5) on an STM32G0B1CEU.This is my shutdown code.HAL_SuspendTick();__HAL_RCC_PWR_CLK_ENABLE();HAL_PWREx_EnableGPIOPullUp(PWR_GPIO_B, PWR_GPIO_BIT_5);HAL_PWREx_EnablePullUpPullDownConfig(); // sets the APC bit in PWR_CR3HAL_PWREx_EnablePORMonitorSampling();HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN6_LOW);// Do reads of registers to ensure they were written(void)PWR->CR3;(void)PWR->CR4;/* Clear all related wakeup flags*/__HAL_PWR_CLEAR_FLAG(PWR_FLAG_WUF);HAL_PWREx_EnterSHUTDOWNMode();This seems to do almost exactly what I would expect it to do.PB5 goes high.Power consumption drops.However, it never wakes up.  I have a wire connected to PB5, which I am measuring with a scope, and confirm that it is going high.  I am them shorting that wire to ground and confirm that it goes low.  The system doesn’t wake up. I know it’s not immediately going back to sleep because right now there is no automated way for it to enter sleep m

Hardware & Setup- MCU: STM32H523RE (I3C target/slave mode) - Controller: STM32H533RE (I3C controller mode)- HAL Version: STM32CubeIDE 1.16.1, HAL for STM32H5- Bus Speed: 3.205 MHz I3C SDR Problem Description We're implementing an I3C target that needs to respond to random address reads with repeated start: [START][ADDR_W][0x01][RESTART][ADDR_R][DATA][STOP] Where:- ADDR_W writes the address byte (0x01) to tell the target which register to read- RESTART signals the repeated start- ADDR_R begins the read phase- Target should respond with data from address 0x01 The problem: Loading the TX FIFO in the RXFNE interrupt handler doesn't work. The hardware transmits stale data before the ISR can fill the TX FIFO with the requested data. 1. RXFNE interrupt fires when address byte (0x01) is received2. ISR starts executing (~1-2µs interrupt latency)3. ISR flushes TX FIFO and writes fresh data to TDR registers4. But hardware has already started transmitting from the (empty/stale) TX FIFO The I3C

I’m working on a system design that incorporates gigabit Ethernet. I’ve been looking at using the STM32N6x7 family of parts to support this functionality. The product selector and datasheet seem to indicate that each package supports the 1000 Ethernet. In addition, the datasheet starts off by listing the gigabit Ethernet as a family supported technology. However, Tables 2 - 5 of the datasheet that list the variations in supported functionality between packages does not list Ethernet whatsoever on any package. To me this implies that the functionality is supported on all devices equally, otherwise the different protocols supported would be listed here.Figure 1: Example of Product Selector FilterFigure 2: Excerpt from Datasheet Listing 1 Gbit Ethernet Support for the STM32 Family Thus, I started with the smallest package for ease of routing and space consumption. However, when matching the device with an external gigabit Ethernet PHY as required, I noticed that there are signals that are

Hi, the MotorControlWorkbench is generating the Feedforward control constants:M1_CONSTANT1_QM1_CONSTANT1_DM1_CONSTANT2_QDHow are the calculated, are there any documentation or formula for it?The Feedforward seems to be relevant for my project because I see current ripple aligned with my DC bus voltage ripple. But in practice there is no improvement, if I activate the FeedForward control. Also the bus voltage is measured with 1 ms and a filter with 6 values is applied. Are there any tips for my application if I have a bus voltage ripple period of 10 ms (3 Phase, 50 Hz)? Thanks for Help Sebastian 

Hi everyone,I'm working on Azure RTOS USBX CDC ACM on an STM32F429ZIT6. The USB device is detected successfully by Windows, and a COM port is created, but I'm unable to transmit or receive any data.EnvironmentMCU: STM32F429ZIT6 STM32CubeIDE: 1.19 STM32CubeF4: 1.28.3 Azure RTOS USBX (X-CUBE-AZRTOS-F4)ProblemThe USB device enumerates successfully:Device Manager detects the USB CDC device. A COM port is created.  No data transfer occurs.  _ux_device_class_cdc_acm_activate() is never called. The CDC ACM class never becomes active.While debugging, I found that execution reaches: UINT _ux_device_stack_interface_start(UX_SLAVE_INTERFACE *interface)where the following assignment is made: class_command.ux_slave_class_command_class = interface->ux_slave_interface_descriptor.bInterfaceClass;Later, USBX calls: _ux_device_class_cdc_acm_entry(&class_command);During the UX_SLAVE_CLASS_COMMAND_QUERY request, the following check is performed: if (command->ux_slave_class_command_class == UX

Hello,Is there any chance ST could provide examples or guidance on interfacing a CSI (MIPI) camera with Raspberry Pi Camera Module 2 NoIR cameras?From my initial research, it seems the CSI connector uses the same pin layout as Raspberry Pi cameras. However, available examples are quite limited, making it challenging to implement this on my own — especially compared to the simplicity of working with DCMI.Any documentation, sample code, or community insights would be greatly appreciated!Thank you.With best regards,Linas

There is a problem with STM32 signing tool version 2.21.0. When header version is 2.3 and alignment flag is used, then image length in header is greater by the alignment byte count.To reproduce:Create dummy.bin that is filled with 256 bytes of FF's. For example with HxD tool.Sign it with no keys:STM32_SigningTool_CLI.exe -bin dummy.bin --type fsbl --no-keys --option-flags 0x80000000 --output signed.bin --dump-header signed.bin --header-version 2.3 --alignView the signed.bin with hex viewer (e.g. HxD) at offset 0x6C which is Image length by UM3234 rev 2:It is 0x2C0 = 704. This is 448 bytes more than original 256 bytes.When removing --align flag from signing call, the length becomes correct, but this image is not bootable anymore because STM32N6 Boot ROM expects FSBL image start address to be aligned to 0x400.I want to use this length field to check during OTA that FSBL upgrade file size and checksum are correct before programming it into Flash. But I wonder how does N6 Boot ROM treat th

Hello ​@ST Community ​@ST MICROCONTOLLER I have purchase NUCELO-H563ZI board.Purpose: I need to read and write pendrive sector using only pure HAL HCD driver (Baremetal Code only) (No FILEX, USBx, ThreadX, FreeRTOS)Following is my Hardware Connection: I am using external USB Type A Female Breakout board. Not using internal CN13 TypeC USB connector.PA11 : D-MinusPA12 : D-PLUSVCC : 5VGND : Board GroundI have attached file which can read and write the sector.While submitting request for “Get Descriptor” command. Code is stuck during USB_EnumerateMSC » USB_GetDescriptor » “USB_ControlTransfer” » “USB_SubmitTransfer” >> “HAL_HCD_HC_SubmitRequest”  stuck in “USB_WaitForURB>>HAL_HCD_HC_GetURBState” function.I can observe that while submitting “HAL_HCD_HC_SubmitRequest” request on channel 0 HAL Drive respond on channel 1 instead of channel 0. ch[0].urbState = USB_IDEL while ch[1].urbState = USB_DONE.Also i have also observe that “HCD_HC_OUT_IRQHandler(hhcd, (uint8_t)i);” API “uint8

Hi, I want to use SPI2 on the STM32H757AIIx, the UFBGA169 package. STM32CubeMX allocates PC2_C pin as SPI2_MISO, but the datasheet only shows ADC2_INN1, ADC3_INP0 as additional functions. SPI2_MISO is not defined on that pin (K13). Which one is correct ? Datasheet or STM32CubeMX ? 

After creating the project from Workbench, I discovered that pins PA14 and PA13 in CubeMX were not working. I checked the Workbench settings again but couldn't find any parameters related to this issue. Without these pins, the motor cannot communicate. I also tried manually configuring them and the motor worked, but I think the Workbench setup would be better.Schematic of B-G431B-ESC1 discovery kitCube MX  

B-G473E-ZEST1SControl Discovery kitSTEVAL-LVLP01Power Discovery kitST offers a sensorless control solution featuring the ZeST (Zero Speed ​​Full Torque) algorithm, bundled with two Discovery kits: the B-G473E-ZEST1S Control Discovery kit and the STEVAL-LVLP01 Power Discovery kit. However, the power board has a relatively low output current (approximately 5 Arms). I would like to know if the ZeST algorithm can be implemented on a different power board that supports a higher output current.

Dear Community,we are writing to report a behaviour observed on the STM32WB5MMG module, and to submit a modification we applied, asking for your assessment of its correctness.Some context on why this matters to us: the product is a battery-powered device, and a primary design goal is to minimise power consumption, hence to maximise the time spent in Stop2. Every exit from Stop2 carries a fixed cost — clock restoration, external oscillator start-up, peripheral re-enabling — which we pay in full even when the wake-up has nothing to do. This is why waking once per second, on a device whose nearest application deadline is tens of seconds away, is a concrete problem for us rather than a cosmetic one.ConfigurationFreeRTOS V10.3.1 in tickless idle (configUSE_TICKLESS_IDLE = 2), tick rate 1000 Hz Low power mode Stop2, CFG_LPM_SUPPORTED = 1 Wake-up from Stop2 through the RTC Wakeup Timer, driven by your HW Timer Server (hw_timerserver.c), as in the BLE_HeartRateFreeRTOS example LSE at 32774 Hz;

Hello everyone,I am working with an STM32H743 running at its maximum frequency of 480 MHz. I am trying to implement VBlank synchronization using the LTDC Line Interrupt and CMSIS-RTOS v1 (FreeRTOS). My goal is to unblock a display/rendering task at every frame interval.According to my hardware configuration, the frame time should be 16.6ms (60Hz refresh rate). The mathematical formula confirms this:Total Width = 920, Total Height = 542, Pixel Clock = 30 MHz. (920 * 542) / 30,000,000 Hz = 0.01662s -> 16.62ms.My FreeRTOS configuration is strictly set to configTICK_RATE_HZ = 1000 (1 tick = 1ms).The Problem & Debugging History:Initially, I placed three hardware breakpoints in my code to track execution flow:(1) Right at osSemaphoreWait in the task loop. (2) Inside the HAL_LTDC_LineEventCallback after re-programming the line. (3) Right at the gm_sprintf line where time delta is formatted.If the synchronization loop worked correctly, the debugger should have hit these breakpoints sequ

Hello ST Community,I am working on an STM32N6 project where I need to implement a USB composite device containing three distinct classes: CDC ACM Instance 1 CDC ACM Instance 2 UVC (USB Video Class) Current Status & Setup:The dual CDC ACM implementation is fully stable and working properly. I generated the basic framework using STM32CubeMX (.ioc), which handles the initial USBX configuration, the first CDC instance, and sets up the composite device configuration. Following that, I manually added the second CDC ACM instance code to the project.On top of this working multi-CDC setup, I now want to integrate the Video Class layer. I have enabled the core video class inside the .ioc file and regenerated the code to expand the descriptor framework.The Challenge:To support high-bandwidth Isochronous (ISO) streaming for the Video class component, I integrated the uvcl (USB Video Class Library) middleware extracted from the ST Edge AI Getting Started exampleThe issue started exactly upo

Hello, We are using Keil MDK with version 5.27 for our firmware developement. We want to start using STM32C5 series and I wanted to use software packs for STM32C5 series by using pack installer in Keil. But it is not possible to download this pack with Keil and also imprting this pack to Keil is not supported. What could be solution for this when we want to retain our IDE as Keil. Our license for Keil supports only for this v5.27. 

Hello everyone,I have an NUCLEO-H755I-Q with the following setup;i) A 50Hz PWM input pulse goes to HTIM1 in PWM input mode with DMA enabled in channel 2 so the moment CCR2 has captured some data they can be transferred,ii) HRTIMCHA2 with CMP1 enabled and; Period 40000 (the timer runs at 2MHz), Preload enabled, Channel A Update resets the timer counter, Set Source the period event and Reset Source the CMP1 event.So what I basically do is simply capture a PWM, make a DMA transfer in the negative edge of the input pulse to the shadow register of the HRTIMCHA2 CMP1 and forward it as output. So, theoretically, the only delay that should be added is only by how much time the hardware needs to do its things. And that, theoretically should be a constant value, since all the work is expected to be done by the HRTIMCHA2. I tried to measure the phase shift the input and output of H7 have by hooking them both in; 1) to a NUCLEO-G474RE and 2) with an oscilloscope. The G4 was just configured to

I'm developing for the NUCLEO-WBA25CE1 using BLE_HeartRate. In the main function, I called MX_APPE_Init(NULL) followed by BSP_LED_Init() to initialize each LED, but they seem to be blinking rapidly throughout the operation. I want to disable this blinking, but I can't find where to do so. Could you tell me how to deal with this?  

Greetings.I'm a Linux user, I use Windows on a smaller notebook for tools like TouchGFX, but this is quite inconvenient.Is there any plan to release a Linux version of TouchGFX Designer?I saw in the documentation that there's a simulator and that it can even be used with Wine; I'll test it today, but it would be really good to have a native version.Link where I saw information about the simulator: https://support.touchgfx.com/docs/introduction/prerequisitesthanks

Hello,I am using an STM32L4R9ZIT6 in a new project. After replacing the MCU with a new one, the LSE oscillator stopped working. And the MCu doesn’t start until one activates the LSI.To troubleshoot the issue, we have:Replaced the crystal Tried different capacitor values Verified that the crystal works normally in another setupSince the only change was the MCU replacement, we are wondering what could be causing this problem. Do you have any suggestions on possible causes or additional checks we should perform?Thank you in advance for your help.Best regards,Roland

Using a new ST-LINK/V2，it always Error: Problem occured  while trying to connectI use the wire I bought before to connect it, it will be OKI want to know why this is 

Dear ST Community Team,I am working on an STM32H747 project with a custom bootloader and OTA update mechanism. The OTA download completes successfully, metadata is written, and CRC verification passes. However, after the OTA apply step, the device does not reboot into the new firmware. The system continues running the old application, and I never see the expected reboot message from the bootloader.Details: Device: STM32H7 series Bootloader checks metadata at 0x081E0000 Staging slot at 0x08100000, App slot at 0x08020000 OTA side writes metadata fields (magic, version, staging base, app base, slot size, image size, CRC) Logs show: "Download OK" and "Applying..." but no reboot occurs

Hello,Is it possible to pull Vref- lower then Vss? For reverse voltage protrection I use a diode and a resistor to create GND1. GND1 is then connected to VSS of the µC.Scematic. All caps omittedCan I connect Vref- to GND? See Image.Datasheet stm32c542ccThe datasheet does not specify.If I connect Vref- to GND1 all values i measure with the ADC must be against GND1 otherwise the result is off by the offset of GND1 to GND.

Hello Team, I am using STM32N6,I am using about 50 GPIOs, all for SPI and I2C communications, and the VDD port supplies 200mA, Will the usage of all these pins consume less than 200mA, or do I have to widen the range of VDD? Also, what is the total max current consumed by the STM32N6 during its maximum processing, Please let me know.Thank you.

MCU / setupSTM32F746IGK, VDD = 3.3 V HSE 16 MHz, PLL: M=8, N=200, P=/2 → SYSCLK = 200 MHz (AHB=200, APB1=/4, APB2=/2) Scale 1 + Over-drive, FLASH_LATENCY_6 Already below the 216 MHz maximum Application executes from the ITCM Flash alias (0x002xxxxx; AXI alias 0x080xxxxx) Cortex I-Cache and D-Cache disabled at startup ART accelerator / prefetch enabled in HAL (ART_ACCELERATOR_ENABLE, PREFETCH_ENABLE) Bare metal, 1 ms cyclic scheduler, no RTOS X-CUBE-STL Flash TM every 1 ms: 1 KB window, HW CRC-32 (poly 0x04C11DB7, init 0xFFFFFFFF, word reverse in / reverse out). Expected CRC is a table built offline from the same image (zlib.crc32 / IEEE 802.3).What we see After several hours in RUN (typically ~11–19 h, not at POST), Flash TM returns STL_FAILED (0xD32D) on a 1 KB window. A software CRC of the same window also mismatches, so this is not only the CRC peripheral.On fail we dumped the 1 KB window from the CPU. The dump CRC always equals the TM computed CRC and differs from the programmed im