STM32F302x6/x8: Memory map inconsistencies in DS9896 Rev 8 and RM0365 Rev 8

[Abdusselam]

Hello everyone,

While reviewing the STM32F302x6/x8 documents (DS9896 Rev 8 and RM0365 Rev 8), I found some inconsistencies in the memory map. Could you please look into them?

DS9896 Rev 8, Table 19, page 49

1. TIM1 is 0x4001 0800 - 0x4001 2FFF (10 K). It should be 0x4001 2C00 - 0x4001 2FFF (1 K). RM0365 shows TIM1 at 0x4001 2C00 - 0x4001 2FFF (1 K) and the range 0x4001 0800 - 0x4001 2BFF as reserved. It looks like the reserved area is inside the TIM1 row. The CMSIS device header also confirms the start address 0x4001 2C00: #define TIM1_BASE (APB2PERIPH_BASE + 0x00002C00UL) (file: stm32f302x8.h).

DS9896 Rev 8, Table 19, page 50

1. I2C3 0x4000 7800 - 0x4000 7BFF has size 9 K. It should be 1 K. RM0365 also says 1 K.
2. Reserved 0x0804 0000 - 0x1FFF D7FF should start at 0x0801 0000. Main Flash is 64 K and ends at 0x0800 FFFF, and RM0365 shows 0x0801 0000 - 0x1FFF D7FF.
3. Typo: 0x2000 4000 - 3FFF FFFF should be 0x2000 4000 - 0x3FFF FFFF.

DS9896 Rev 8, Table 19, page 51

1. Reserved 0x0004 0000 - 0x07FF FFFF should start at 0x0001 0000. The boot area is 64 K (0x0000 0000 - 0x0000 FFFF). As written, the range 0x0001 0000 - 0x0003 FFFF is not defined.

2. The “APB1” label is on the boot area row. This row does not belong to any bus. RM0365 shows “-”. APB1 starts at 0x4000 0000.

3. Typo: 0x0000 000 should be 0x0000 0000.

DS9896 Rev 8, Figure 8, page 48

1. The start addresses in Figure 8 match Table 19. But some end addresses are different from Table 19 and RM0365.

Figure 8	Table 19 / RM0365
AHB3 ends at 0x5000 07FF	ADC1 ends at 0x5000 03FF
APB2 ends at 0x4001 6C00	In RM0365, APB2 ends at 0x4001 7FFF. The last peripheral (TIM17) ends at 0x4001 4BFF, and 0x4001 4C00 - 0x4001 7FFF (13 K) is reserved.
APB1 ends at 0x4000 A000	In RM0365, APB1 ends at 0x4000 9BFF. The last peripheral (I2C3) ends at 0x4000 7BFF, and 0x4000 7C00 - 0x4000 9BFF (8 K) is reserved.
Flash ends at 0x0804 0000	Main Flash ends at 0x0800 FFFF (64 K)

 

 

RM0365 Rev 8, Table 4, page 58

1. A reserved row is missing between TIM1 and USART1. In RM0365, TIM1 ends at 0x4001 2FFF and USART1 starts at 0x4001 3800, but there is no row for the range 0x4001 3000 - 0x4001 37FF (2 K). DS9896 shows this range as two reserved rows (0x4001 3000 - 0x4001 33FF and 0x4001 3400 - 0x4001 37FF).

2. Reserved 0x4001 0800 - 0x4001 2BFF has size 8 K. The real size is 0x2400 bytes, which is 9 K.