STM32U535RET6 – IWDG EWI and Window Mode Clarification

[Sharif]

Hello ST Community,

I am working with the STM32U535RET6 and need clarification on the interaction between the IWDG Window feature and Early Wake-up Interrupt (EWI).

I tested the following configurations:

1. Window enabled, EWI disabled

The Window feature works as expected:

• Early refresh → IWDG reset
• Late/no refresh → IWDG reset

2. EWI enabled, Window disabled

When only EWI is enabled, the EWI interrupt occurs when the counter reaches the configured EWIT value.

In the ISR, the HAL code acknowledges the EWI by setting EWIC.

According to RM0456, writing EWIC = 1 clears EWIF and also reloads the IWDG counter with RL[11:0].

However, in my observation, the EWI ISR is called only once, and I do not observe the expected counter reload after the EWI acknowledgement.

3. EWI and Window enabled together

When both features are enabled, I observe different behavior.

For example, with EWI configured for approximately 2 seconds, the EWI occurs repeatedly at approximately every 2 seconds. The IWDG counter appears to be reloaded after each EWI, so the counter never reaches the normal watchdog timeout.

Clarification required

Could you please clarify the following for the STM32U535RET6?

1. When only EWI is enabled, why do I observe only one EWI interrupt, although RM0456 states that EWIC = 1 reloads the IWDG counter?
2. When EWI and Window mode are enabled together, why does the EWI occur periodically, with the counter apparently reloaded after each EWI?
3. Is this the expected interaction between EWIC, IWDG counter reload, EWI, and Window mode?
4. What is the recommended configuration of RL, WIN, and EWIT to use both Window mode and EWI correctly, with EWI as an early warning while still allowing the IWDG to generate a reset if the application fails to refresh?
5. Is there a recommended HAL EWI ISR handling for this use case, considering that HAL_IWDG_IRQHandler() handles the EWI flag?

My intention is to use EWI only as an early warning, while retaining the normal IWDG Window watchdog reset protection.

Thank you in advance.

[Saket_Om]

Hello ​@Sharif 

We have detected a bug on current IWDG HAL implementation that could explain the observed behavior.

 

If early wake up interrupt is activated, after early wakeup occurrence, the early wakeup flag is cleared on HAL_IWDG_IRQHandler function.

This flag is cleared by writing 1 on EWIC bit of IWDG_EWCR register.

But IWDG_IWCR register is one of write protected registers. So, it is mandatory to enable write access before writing on it.

On current implementation of HAL_IWDG_IRQHandler, this enable write access is missing so writing to IWDG_EWCR generates a reset.

We will correct it but waiting new delivery, you can test the following patch on your HAL_IWDG_IRQHandler (adding line “IWDG_ENABLE_WRITE_ACCESS(hiwdg);” just before writing on IWDG_EWCR register):

Please note also that clearing EWIC flag will reload the IWDG counter.

So, it means that if you use early wakeup interrupt, you can’t use it only as an early warning as you expect.

 

You can perhaps use a very small value of EWI to have warning just before a reset if counter has not been reloaded ?

I reported the issue internally. 

Internal ticket number: CDM0066361 (This is an internal tracking number and is not accessible or usable by customers).

[Sharif]

Hello,

Thank you for the clarification and for identifying the HAL issue.

I understand that writing EWIC = 1 to clear the EWI flag also reloads the IWDG counter. In that case, if the EWI ISR executes and clears EWIC, the IWDG counter is reloaded.

Could you please clarify how the normal IWDG timeout reset can occur when EWI is enabled and the EWI ISR clears EWIC?

Regards,
Sharif