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Hello everyone,I am working on a project where I need to control a BLDC motor with integrated hall sensors.I saw this feature on RM0440 Document ‘29.3.28 Timer input XOR function’I decided to use the TIM2 as the ‘Interfacing Timer’ and TIM1 as the PWM generating/motor driving timer.I can read the time period between the hall sensor changes via TIM2->CCR1 register but I can not get the COM event with TIM1. Can anyone help?The following is my CUBEMX setup: Here are the snippets of my code which I think are the most related. If you need other parts of my code I can provide it.
I am using the starm-clang with cmake.I need to use multithreading lock. I understand that in standard PICOLIBC the locking functions are included but just as stubs and "weak" defined and you need to override the functions and define new implementations to use them.I tried to do this but I get all kinds of "duplicate symbols" errors when I link.Are you doing something special with the STARM_PICOLIBC library?Is the locking functions already implemented and functional in you version of PICOLIBC?
It’s long known that in ‘F4, if the USB/OTG’s PHY is switched on, it overrides the GPIO settings of its DP/DM pins.Today, I’ve spent some quality time debugging hardware, having been bitten by the same thing on a ‘L452.I didn’t expect this, given entirely different USB module.Neither of these is documented, of course.Maybe it will spare somebody other’s time.And maybe ST will document it, one day. It’s only^H^H^H^Hnot even 12 years since that first post, after all.JW
Hi 👋I have implemented a simple program to send and receive characters over the USART device which works as expected when I connect my MCU up to minicom via usb as in I can see the characters sent by the program getting printed on the console and I can see the characters I type on minicom in the relevant variable in gdb.Next, I tried connecting the TX and RX pins together to have transmission and reception in loopback mode but that doesn’t seem to work. My program (which does both transmission and reception in simple polling mode) simply gets stuck on the RXNE != 1 loop and never exits that indicating that the RX pin either never receives any data or it never detects a start bit so it just remains at the idle state waiting for that. So, I’m wondering what the reason for this might be..could it be that minicom simply sends the right start bit sequence which the Receiver picks-up? Or something else..?The program in both cases is exactly the same so the only difference is that in loopbac
In later revisions of the stm32n657 datasheet the minimum Vbat has been changed from TBD to 3.0V. Can you shed some light on why 3.0V was chosen? It looks like everything that Vbat powers should theoretically work below 3V(in particular VSW is good down to 2V). The reason I’m asking is that if we follow the 3.0V to 3.6V window strictly there is not a good primary cell chemistry that matches that. Lithium manganese dioxide is too low of a voltage for most of the discharge curve. Lithium thionyl chloride would work well but a fresh cell will be a little above 3.6V.Is lithium thionyl chloride the intended chemistry? Chances are it would probably just work since it would be below the absolute max rating. Does ST have an intended backup supply architecture for Vbat other than applying a cell voltage directly to Vbat?
Hello, I am using stm32f429zi for my project, I set timer 1 with 4 channels (channel 1 and 2 as input channel, and channel 3 is output channel). I would like to generate a pulse from channel 3 with low frequency and around 50% width to set a communication handshake signal to different control board. I set main frequency as 168MHz, so timer 1 APB2 is 168MHz. the setup is followed: TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; TIM_IC_InitTypeDef sConfigIC = {0}; TIM_OC_InitTypeDef sConfigOC = {0}; htim1.Instance = TIM1; htim1.Init.Prescaler = 2099; htim1.Init.CounterMode = TIM_COUNTERMODE_UP; htim1.Init.Period = 65535; htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim1.Init.RepetitionCounter = 0; htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; if (HAL_TIM_Base_Init(&htim1) != HAL_OK) { Error_Handler(); } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; if (HAL_TIM_ConfigClockSource(&
Hello everyone,I am working on Ethernet communication using the STM32H750B-DK with STM32CubeIDE and LwIP. I am using the onboard LAN8742 Ethernet PHY and a direct Ethernet connection between the PC and the board. LwIP is configured with NO_SYS = 1, and I am continuously calling MX_LWIP_Process() in the main loop. When I check the Ethernet traffic in Wireshark, the PC continuously sends ARP requests asking for the STM32 MAC address, but the STM32 does not send an ARP reply. While debugging the gnetif structure, I see PHYLinkState = 0, speed = 0, and duplex = 0. I also checked the STM32H750B-DK documentation and found that the onboard Ethernet PHY is connected through MII. My CubeMX project was initially configured for RMII, so I changed the Ethernet configuration to MII. I am also checking the Ethernet DMA/LwIP memory configuration and moved the Ethernet descriptor and RX buffer sections to D2 SRAM using the linker script. However, I still cannot get a ping response from the board.Curre
So have an STM32H563 that I was trying to get to work with DFU. I read through the Docs and saw that for that to work I needed PRODUCT_STATE in Open with Boot Pin high or PRODUCT_STATE in Providing. I tested the first option and couldn’t get that working and so figured to test if the Boot Pin was the issue I set the PRODUCT_STATE to Providing. It still didn’t work, however the more important issue now is when I was trying to set it back to Open it wouldn’t let me do that. I then flailed a little and think I may have set the PRODUCT_STATE to Closed or Off or something and saved that. Now, I can’t get back into the chip at all. I get either this error: Or if I try it in Under Reset mode I get this error: So Im wondering, did I completely brick this chip, is there a way to check that, and if I didn’t, what can I do to get this to let me back in
Hello everyone,I'm developing a LoRaWAN end-device based on the STM32WL using the official ST LoRaWAN stack, and I'm facing a reproducible freeze that only happens with ChirpStack, not with TTN.EnvironmentMCU / Board: STM32WL55JC Stack: STM32Cube_FW_WL — APPLICATION V1.3.0, MW_LORAWAN V2.5.0, L2_SPEC V1.0.4, RP_SPEC RP002-1.0.1 Region: AU915 (sub-band 1, channels 0–7 + 64) Activation: OTAA, Class A, unconfirmed uplinks every 30 s Same hardware and same gateway used in both testsProblem On ChirpStack, after the join the device sends only 4–5 uplinks and then freezes permanently: it stops transmitting and never recovers. Current measurement shows the radio stuck at ~14 mA (looks like it stays in RX), while a normal TX peak is ~74 mA.Key observation The freeze always happens right after ChirpStack sends LinkADRReq commands. In my logs, ADR ramps the TX power (PWR 0 → 2 → 5 → 7) on consecutive uplinks, and the device locks up on a frame where both RX1 and RX2 time out. The device answers L
[PN]: STM32G431RB, custom motor-control board[VERSION]: MCSDK 6.4.1 Full, STM32CubeMX 6.15.0[TOOL]: Motor Control Workbench code generator / MC firmware[TYPE]: Enhancement request / generated-code consistency issue[DETAILS]The generated project contains motor and drive parameters in:- pmsm_motor_parameters.h- drive_parameters.h- power_stage_parameters.h- parameters_conversion.hMost runtime configuration correctly uses these macros or derived macros.However, mc_configuration_registers.c duplicates several motor parameters as numeric literals in ApplicationConfig_reg_t and MotorConfig_reg_t, even though this file already includes parameters_conversion.h.Examples from one generated project:- maxMechanicalSpeed = 15900 duplicates MOTOR_MAX_SPEED_RPM / MAX_APPLICATION_SPEED_RPM- nominalCurrent = 0.68 duplicates NOMINAL_CURRENT_A- nominalVoltage = 24 duplicates NOMINAL_BUS_VOLTAGE_V- polePairs = 1 duplicates POLE_PAIR_NUM- ratedFlux = 0.8 duplicates MOTOR_VOLTAGE_CONSTANT- rs = 3.16 du
Hi,We are planning to use SIL2 certified controllers in one of our design. Below are few queries from my end which i request your supportFrom details available in internet, i came to know that no standalone controllers with SIL2 certified. Is that correct? STM provides Safety SW packages to achieve SIL2 & SIL3. Is that correct? Which series of controllers STM recommends to use along with Safety SW to achieve SIL2 or 3? We planned to use STM32U series? Will that be fine along with Safety SW package? Is the safety SW packages are open source (Free to use) or need to be paid? If any series STM recommends to use; i need evaluation boards and links where i can order from ThanksArfaj
I have two concurrent UART DMA RX running in STM32l431. UART2 is running all the time and UART3 is started when a command is sent and waiting for data. Both of them works, but when I try to make a new DMA transfer on one of them the other stops which I do not want. Why does this happens? Here is the initiation:DMA_HandleTypeDef hdma_rx2;DMA_HandleTypeDef hdma_rx3;DMA_HandleTypeDef hdma_lrx1;DMA_InitTypeDef DMA_InitStructure;void HW_DMA_Init(){ __HAL_RCC_DMA1_FORCE_RESET(); __HAL_RCC_DMA1_RELEASE_RESET(); __HAL_RCC_DMA1_CLK_ENABLE(); __HAL_RCC_DMA2_FORCE_RESET(); __HAL_RCC_DMA2_RELEASE_RESET(); __HAL_RCC_DMA2_CLK_ENABLE(); currentDMABufferWrite = 1; currentDMABufferRead = 0; dmaLen1 = 0; dmaLen2 = 0; dmaHasData1 = false; dmaHasData2 = false; /* Configure the DMA handler for reception process */ hdma_rx2.Instance = DMA1_Channel6; hdma_rx2.Init.Direction = DMA_PERIPH_TO_MEMORY; hdma_rx2.Init.PeriphInc = DMA_PINC_DISABLE; hdma_rx2.Init.MemInc
Hello, I am wondering what is the memory interface of the embedded 2MB flash? Like is it SPI .etc Thank you!
I am doing a project on STM32F479ZGT6. I set all my pins to HIGH default, open drain, external pull up on STMCubeMX. During power on, the IO pins first follows 3.3V by the external pull up, but then two of the IO pins becomes LOW during reset release, and then after reset is completely released, it turns back to HIGH(default logic set in STMCubeMX). Does STM32 has the ability to change logic opposite from the default logic only for a moment?(which in my case is during reset release) Would be glad to know any possible cause and solution for this case.Red: ResetBlue &Green: IO pin
Hello,I am working with an STM32N657 on the NUCLEO-N657X0-Q and I am trying to use the Ethernet PTP PPS signal as a hardware start trigger for TIM3.TIM3 is configured as follows: HAL_TIMEx_TISelection(&htim3, TIM_TIM3_TI1_ETH1_PPS, TIM_CHANNEL_1);sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;sSlaveConfig.TriggerPolarity = TIM_TRIGGERPOLARITY_RISING;sSlaveConfig.TriggerPrescaler = TIM_TRIGGERPRESCALER_DIV1;sSlaveConfig.TriggerFilter = 0;HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig);TIM3 itself uses an external clock on ETR2 and should only be enabled by the rising edge of ETH1_PPS.The internal connection works correctly when I use the normal/fixed PPS mode.For example: ETH1->MACPPSCR = 1U;In this case the PPS rising edge reaches TIM3, TIM3->CR1.CEN becomes set, TIM3 starts counting and the rest of my application starts correctly.However, I cannot get the same internal connection to
Hi ST Community,I have a question while reading the reference manual RM0440.On page 915, Figure 232 shows a timing diagram where the event is labeled "Reset on CMP2". However, looking closely at the waveform, the HRTIM_CHx2 output seems to be reset at CMP4, rather than at CMP2 as the text implies.Could anyone help clarify this? Is this a typo in the manual, or is there a specific HRTIM mechanism/priority that causes the reset to actually happen at CMP4 in this scenario?Any explanations would be greatly appreciated. Thanks in advance!
HIHow to create a project for STM32H7 with Ethernet and LwIP stack working | CommunityRx buffers labeled “Zero Copy” and are used by DMA and CPU are not marked by MPU for cacheable? only descriptors are. I couldn’t find any special clean or flush cache operations in code as well. Why is that? Image below shows only descriptors (512B) and TX (LWIP heap) are noncacheable.
Does the STM32N6 XSPIM permit multiplexed mode with different memory types on the two instances? XSPIM_CR.MUXEN=1, mode = multiplexed to Port 2, with XSPI1 as MTYP=101 (HyperBus) driving a HyperRAM on NCS2, and XSPI2 as Quad SPI driving a NOR on NCS1.CubeMX 6.18 refuses it requiring both modes to be same but RM0486 reference manual makes no such distinction or state no restriction on memory types. Which one is authoritative? Can I mix them ? If mixed types are legal, are there constraints on DQS/RWDS and CLK/NCLK when only one instance uses them (NOR does not connect to NCLK for example)?
I need more PSRAM and so went exploring and found RM0486, which seems to show that I can have two PSRAM on one XSPI port (using EXTENDMEM, §28.4.24), but I cant seem to find more than that.Is EXTENDMEM with two octal DDR PSRAMs a silicon-validated configuration on the N6 XSPI, or is it documented-but-untested territory? RM0486 notes the automatic CS switch when an access "crosses the middle boundary of the external memory". Does this work transparently with DTR memory-mapped writes and MDMA/DMA bursts, or are there alignment/burst-length restrictions at the boundary I should design around?Has anyone run 128 MB total on one N6 XSPI port? The 256 MB address window and DEVSIZE math allow it, but I'd love to hear from someone who has it working on real hardware (or from ST whether an eval/reference design exists with dual PSRAM).Anything to watch on the RIF/RISAF side for the XSPI1 memory region when all masters run secure?Board: custom using the STM32N657X0HxQ.Planned setup:Two identical
Hello,I have an STM32G474RE Nucleo-64 with an X-NUCLEO-IHM16M1 driving a GB2208 motor with 7 pole pairs. My goal is to use an AS5048A absolute magnetic encoder for sensored FOC and position control.MCSDK already runs the motor correctly in sensorless mode, and I can reliably read the AS5048A. However, integrating it into MCSDK has been much less straightforward than expected.Current implementationI use TIM1 CH4 to trigger TIM2. TIM2 starts the AS5048A SPI transaction approximately 3 µs after the trigger. My assumption was that this provides a relatively quiet switching interval, avoids interfering with current ADC sampling, and reduces MOSFET switching noise. I am not certain whether this assumption is valid or whether encoder acquisition should instead be synchronized with a specific PWM/ADC event.After determining the encoder direction and electrical offset, I calculate the electrical angle as:electrical_angle = (pole_pairs * mechanical_angle + electrical_offset);I then inject the en
Hello everyone,It is more a bug report than a question, but in the last version of X-CUBE-EEPROM, (X-CUBE-EEPROM | Product - STMicroelectronics) I found out that value “EE_NO_PAGE_FOUND” is defined twice.Once in eeprom_emul.h:/* No page define */#define EE_NO_PAGE_FOUND ((uint32_t)0xFFFFFFFFU)And once in eeprom_emul_types.h:/** * @brief EE Status enum definition. *//* Define of the return value */typedef enum { /* External return codes : ok */ EE_OK = 0U,... /* Internal return code */ EE_NO_PAGE_FOUND, -> here, second definition EE_PAGE_NOTERASED,...} EE_Status;Is it made on purpose? Best regards
i have a problem regarding the usage of the jpeg codec on a stm32n657x0h-q to decode images. the project also involves the transfer of such images over eth0 but for the sake of isolation of the problem i have bypassed mongoose. the problem seems to relate only to jpeg interrupts since the hpdma channel0, used to feed the periperal, is working.To develop this project i followed this example for the discovery kit.doing some debugging, i noticed that confr0 is being manipulated (i used a watchpoint), both jpeg_cr and jpeg_sr are being set, but confr1 has a strange behaviour: during Init_process, its registers are properly set, then, when manually halting execution in the cycle in main, the confr1 is set to all zeros. During initialization, registers are as follows:Confr1 has DE and HDR set to 0x1, the others to 0x0;cr has JCEN, EOCIE and HPDIE set to 0x1, the others to 0x0sr has IFTF, IFNFF and COF set to 0x1, the Others to 0x0COF in jpg_cr remains 0x1, as does the JCEN, thus the pheriper
Environment: TouchGFX 4.26.0, Windows, Ruby 3.0 (bundled MinGW env). Text database: texts.xml is 13.7 MB - 20 languages x 8,255 text entries = 165,100 translations. "remap": "yes" in application.config, binary translations and binary fonts both enabled for one of the passes. Symptom: make texts took ~181s cold on a developer machine, ~2min on our build server. Adding timing markers around each phase of Generator#run put 146s of it inside StringCollector#run. Cause: the fold that collects the translations, in framework/tools/textconvert/lib/string_collector.rb: all_strings = Array.new(languages.count, Array.new) text_entries.each do |text_entry| text_entry.translations.each_with_index do |translation, lang_index| all_strings[remap_global ? 0 : lang_index] += [translation] end end`a += [x]` allocates a new array and copies the whole accumulated contents on every iteration, so this is O(n^2) in the number of translations. With global remapping every language fold
Hi everyone,I am using an STM32H753ZIT6 on our custom PCB. Before this, I was successfully programming the STM32H753ZI on the NUCLEO-H753ZI board using the UART bootloader (system memory boot mode) with STM32CubeProgrammer and a USB-to-UART TTL converter. I have never used an ST-LINK for programming.I followed the same hardware connections and programming procedure on our custom PCB, but STM32CubeProgrammer always returns a timeout error and cannot connect to the MCU.Setup MCU: STM32H753ZIT6 Software: STM32CubeProgrammer Programming interface: UART bootloader (not ST-LINK) USB-to-UART converter connected to USART1 TX of USB-UART → STM32 PB15 (USART1_RX) RX of USB-UART → STM32 PA9 (USART1_TX) Manual boot mode selected (not using RTS/DTR auto boot) Programming Procedure Hold BOOT0 HIGH. Reset or power-cycle the board. Release RESET while keeping BOOT0 HIGH. Click Connect in STM32CubeProgrammer. This exact procedure works on the NUCLEO-H753ZI but fails on our custom PCB.
Hello STM team, We are working to interface the NUCLEO-U5A5ZJ-Q and nRF7002-DK using QSPI. We are using vanillas zephyr. We are able to built the code for SPI. But can not be able to built for QSPI. It will be very helpful if you provide a proper support to interface this.
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