STM32WL33x AES GCM How Do I Produce Valid Ciphertext and Tag?
Hi, I’m having trouble getting valid ciphertext and tag from the AES peripheral in AES GCM mode using the HAL. I know that some HALs for other chips have resolved the tag mismatch issue (e.g., STM32H7xx - AES GCM Invalid Tag Generation after Decryption). It appears that issue was resolved by accounting for the data swapping when zero padding a final block inferior to 128 bits. I applied a version of the fix to my code (based on both reference manuals the interface to the AES is nearly identical) but I’m still having tag issues. I noticed that before and after this fix zero padded words were being written to the AES input register last. Figure 73 on p369 in the RM0511 Reference Manual seems to imply that zero padded words should be written BEFORE the valid words of the block. Am I misinterpreting the figure?
Tag and padding aside, I’m not even able to produce valid ciphertext compared to another implementation of AES GCM (python cryptography library). I use the same 128-bit key, the same 96-bit IV, no AAD, a single 128-bit block of plaintext. I’ve tried with every data swapping and data width configuration. I’ve tried swapping the register order used to write the key and IV (HAL writes first key word to AES_KEYR3 and final key word to AES_KEYR0 and does the same with the IV). I always write 0x0002 to AES_IVR0 according to Table 52 on p358. Not one combination of these configurations has yielded the same result as the python implementation. I’m not encountering any errors. Every encryption operation succeeds. What am I doing wrong?
