STM32 MCUs

Hello STM32N6 Tech support I am writing with reference to power on sequence. My power sequence is as follow1. First VDDA1V8_AON, VBAT and VDD is applied. My VDDIO4 & VDDIO5 is also connected with VDD.2. VDDCORE is supplied from an external SMPS step-down converter. We applied VDDCORE when the PWR_ON signal is high. VDDCORE is also connected with VDDCSI3. On the same PWR_ON my VDD3V3 is switched on. It is connected with VDD33USB.4. On the same PWR_ON my VDDA1V8 is connected. However, the input voltage of VDDA1V8 (linear regulator) is connected with VDD3V3. VDDA1V8 is connected with VDDA18CSI, VDDA18USB, VDDA18ADC.Can you please explain the above mentioned sequence will work for powering on STM32N6. I need comments on the following.1. Step 3 & Step 4 is not strictly defined in Getting started with hardware development for STM32N6 MCUs - Application note.pdf and an6000-how-to-build-the-discrete-power-supply-for-stm32n6-mcus-stmicroelectronics.pdf.2. I am not following any power do

Hello,I am looking for an existing implementation of the SAE J2716 SENT (Single Edge Nibble Transmission) protocol for an STM32L4xx device.My goal is to interface with sensors that use the SENT protocol and decode the incoming data stream on the MCU.At the moment, my idea is to use:A timer channel configured in Input Capture mode to measure pulse widths. DMA to transfer captured timer values with minimal CPU overhead. Some form of interrupt or callback to process a complete 32-bit SENT message (24-bit payload + CRC + Status nibble).Since this requires coordinating several hardware peripherals (timer, input capture, DMA, interrupts, and frame decoding), I would like to know whether ST already provides any of the following:Application notes related to SENT reception. Example projects demonstrating SENT decoding. STM32Cube examples, Middleware, libraries, or reusable classes implementing the SENT protocol.If anyone has experience implementing SENT on STM32L4 devices, I would appreciate an

Hi,The project was created in stm32mx from the example project cortexm_sysk.It was generated as a CMake project and developed using VS Code.The "USB Device Middleware Library MCU Software Component" library, version "V2.11.4 / 11-April-2025", was manually added.CDC alone OKUVC alone OKCDC/HID OKCDC/UVC NOT OKSee file in attachment.I noticed the file descriptor is large (239 bytes). Is that a problem?Is there another setting I need to change?Regards,Sébastien

I am trying to get to the lowest possible power consumption on a WB55 NUCLEO board while the BLE is advertising every three seconds and waking up on the RTC every second.  I have the NUCLEO booting up on the HSE clock, and the stm32_lpm_if.c code switches from HSE to HSI and back as it enters and exits STOP2.  Re-enabling HSE takes about 24 ms and consumes significant current, giving me an average of about 62 uA in this mode.  I’ve found that if don’t enable the HSE, but stay on the HSI the current drops to about 10.5 uA.   The BLE radio functions normally, and I can connect and disconnect and return to the 10.5 uA advertising mode.  Is CPU2 somehow choosing the LSE clock to run on when it exits STOP2 and the HSE is not available?   What is going on?  The documentation is adamant about needing 32MHz for the system clock when running the radio.

Hi,I am using the STM32H563ZI with the MB1404C board and running the “I3C_Controller_HotJoin_IT” example from the following repository: https://github.com/STMicroelectronics/STM32CubeH5/tree/main/Projects/NUCLEO-H563ZI/Examples/I3C/I3C_Controller_HotJoin_IT.The target device is a different board, not another STM32H563ZI - for example, the “I3C Protocol Analyzer and Exerciser” from Prodigy Technovations.After initializing the I3C controller and connecting the I3C target device to the bus, the SCL line of the I3C controller continuously toggles.Using STM32 Sidekick, I identified the following errata:Errata: Constant SCL Ticking with I3C Controller on STM32H563ZI1. Known Issue DescriptionWhen using the STM32H563ZI in I3C controller mode (such as with the I3C_Controller_HotJoin_IT example), there is a documented errata where, after initialization, the controller may incorrectly detect the SDA line as low, interpret it as a start request, and activate the SCL clock. This results in the cont

 I would like to learn TouchGFX development using the STM32H7S78-DK board. Could you please guide me on the recommended way to get started? any example? 

HelloI’m using TouchGFX 4.26.0 on a STM32H747 and want to use RGB compression of the bitmaps to get the size of the firmware image smaller. To prevent performance loss, all bitmaps are loaded into the cache at startup. I have enough free SDRAM for the cache, so this is the easiest method and doesn’t require manual maintenance when adding / removing bitmaps to the project.Because the displays native orientation differs from the application orientation, image rotation is set to 90° by default.The code to load the bitmaps is shown below. This function is called at the end of TouchGFXHAL::initialize()​void loadAllBitmapsIntoCache(){ const uint16_t totalBitmaps = BitmapDatabase::getInstanceSize(); for (uint16_t id = 0; id < totalBitmaps; ++id) { touchgfx::Bitmap bmp { id }; auto format = bmp.getFormat(); bool ok; if (format == touchgfx::Bitmap::BitmapFormat::COMPRESSED_RGB565 || format == touchgfx::Bitmap::BitmapFormat::COMPRESSED_ARGB8888 ) { ok = touchgfx::Bitmap::decompressR

For first time programming this IC the reset pulse should go high to low for 4ms then it should comeback to high like a pulse which is programmer to use ?STLINK-V3MINIE - will be suitable ?Suggested for this requirement a programmer.MPN : STM32L021D4P7

Hi,I have read about the capabilities of the STM32G030P6T6 microcontroller, and they are truly excellent. Is it possible to implement any desired effect for WS2812 LEDs using this microcontroller without an HSE crystal?Are there any limitations?

Hello,I’m recently working on utilizing ROM I2C bootloader on STM32C0116F6U6, Device ID: 0x443, Rev Z.It seems that bootloader is reporting wrong version 0x11 instead of 0x12, while I got reply to GET command (0x00) from protocol v1.2 instead of v1.1 - there is clearly a byte 21 (0xA1) in reply (which is protocol v1.2 according to AN4221). Get as well as get version command are both returning 0x11.Because of this bug utilities like stm32flash are failing by not reading all bytes after issuing get command. stm32flash will try to resync by writing bad command (0xFF) and waiting for NACK but bootloader can keep clock line low for up to 6.2s if all bytes from previous transaction were not read.LA outputs, Get version:  Get command is returning 0xA1 byte which should not be there:  stm32flash too short get command read (it was expecting protocol v1.1), clock line will be hold low for 6.23s after writing resync byte (0xFF):  

Hello Team,I am currently reviewing the Secure Manager memory layout described in UM3254 (Secure Manager for STM32H573xx microcontrollers). The document provides predefined flash memory mappings for STM32H573 devices, including the Large Profile layouts shown in Figure 9 and Figure 10.       Our plan is to use STM32H5F4, which provides 4 MB of Flash, and I would like to understand the recommended Secure Manager memory mapping for this device. Could you please help with the following:Is there a predefined Secure Manager flash layout available for STM32H5F4 (4 MB Flash)?If available, could you share the corresponding memory map.Could you point me to the exact documentation, application note, user manual section, or reference project that describes Secure Manager support for STM32H5F4 devices?If no predefined layout exists, could you provide guidance on how the memory regions should be scaled from the STM32H573 large profile/External Flash profile example to support 4 MB Flash devices? Th

The above Logic analyzer and debugger  show a correct touch register If the simple GT911 library is used in bare bone STM32F429 but when the Code is integrated with the touchgfx and freertos of the sample STM32F429ZI Disco board then the I2C seems to get stuck and no I@C Communication happens as shown below. Touchgfx and Freertos integration  This is the initial power on this is zoomed view of packet 1zoomed view of packet 2After this the interrupt is generated periodically and I2C Communication halts indefinitelyBare Bone Codehave been attached and the Touchgfx freertos main.c/* USER CODE BEGIN Header *//** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * <h2><center>© Copyright (c) 2020 STMicroelectronics. * All rights reserved.</center></h2> * * This so

I’ve implemented a sort of dynamic menu where there are 6 positions and you can resize the menu item to become 2x1 or 1x2 (see screenshot for a better understanding)It is achieved by a custom widget class built on top of ShapeThe elements can be dragged and moved around and I’m using handleDragEvent to achive that. When dragging around there’s a method that re-position the element to avoid overlapping.For some reason, sometimes, not always, when the elements are moved automatically around, some strange artifacts. Is there a reason for that; where should I watch?(at the moment I’m only using the simulator)artifactshow it should render

Hi,I am using STM32H747I-DISCO with MB1166-A09 (NT35510) and Zephyr + LVGL with MIPI DSI Video Mode.I am facing a diagonal/slanted tearing line when the display is configured in landscape mode.Portrait mode: works correctly Landscape mode: diagonal/slanted tearing appears during screen updates Hardware: STM32H747I-DISCO + MB1166-A09 / NT35510 Software: Zephyr + LVGL PROI have found several related discussions about this issue, but I haven't found a clear solution for landscape DSI Video Mode.Is this a known limitation/issue with the display/DSI configuration? Is there a recommended solution for running this display reliably in landscape Video Mode?Any guidance from ST or anyone who has solved this would be greatly appreciated.

Hello everyone,I'm working on a custom PCB (professionally soldered, LGA packages) builtaround an STM32G474RET6, and I'm stuck on a communication issue with twoof my three SPI sensors. I'd really appreciate some insight from anyonewho has run into this before.My setup:- Host MCU: STM32G474RET6- Shared SPI3 bus: SCK=PC10, MISO=PC11, MOSI=PC12- TMAG5170 (SPI-only magnetometer), CS=PA11- ISM330DHCX (IMU), CS=PD2- MMC5983MA (magnetometer), CS=PA12The symptom I'm seeing:My TMAG5170 communicates perfectly over SPI, which tells me my SPI3 bus,my shared SCK/MISO/MOSI wiring, and my power rail are all healthy.However, my ISM330DHCX and MMC5983MA never respond in SPI mode — WHO_AM_I/ Product ID reads keep returning garbage (0xFF).Here's what I've already tried:1. I ruled out a software bug by switching from separate   HAL_SPI_Transmit / HAL_SPI_Receive calls to a single   HAL_SPI_TransmitReceive — no change.2. I checked for solder bridges under the LGA packages with a multimeter   (MISO to 3V3,

I’ve noticed that the order of the registers seems to matter. I would like an explanation as to why this is the case and if there is anything documented on this front.Specifically if you want to request the following registers: 25, 89, 1425, 2649, 7001, 73It appears that for some reason or another 73 must be last. If you request the above registers with 73 being anywhere but the last register it seems to cause the G4 to lock up and stop responding to any MCP or ASPEP commands. You also seem to be unable to recover without power cycling the core.Valid Order: 25, 89, 2649, 7001, 1425, 73->e9 00 00 b0->11 00 19 00 59 00 59 0a 59 1b 91 05 49 00<-4a 01 00 f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2e 00 00 00Invalid Order: 25, 89, 73, 2649, 7001, 1425->e9 00 00 b0->11 00 19 00 59 00 49 00 59 0a 59 1b 91 05No response and the G4 hangs...Somehow it seems that the ST Motor Pilot is aware of this as it does place all the STATE register last in the packet.Motor Pilot v6.4.

Hello I would like to build a full bridge converter according to attached topology picture. The signals for controlling the switches should be like in the picture pwm_scheme. The frequency should be 500KHz. How to configure TIM1 or TIM8 on STM32H725ZGT6 to achieve this? To control the current i1 with lowering the duty cycle of the PWM which input is better to use: ETR or BKIN? Best regards Simon

The AN3156 explains on page 18 the Read Unprotect Command:This command is selected when wValue = 0 and the first byte of the buffer sent by the host is 0x92. The buffer length is only one (the command) byte.The host sends a DFU_DNLOAD request with the above parameters to remove the read protection of the internal flash memory.   It is very useful that you implemented a command to remove the read protection.But this is useless if there is also a write protection active.The user has no way to remove a write protection over the DFU protocol.Why does this command not remove both: The read protection AND the write protection at the same time?Why does STM implement nothing that allows to remove a write protection ?

Hi, I'm having some issues with the STM32WB06 when trying to achieve low power consumption. I hope someone can help me solve these problems. Issue 1: After initializing the Bluetooth protocol stack and enabling automatic connection establishment, it causes the device to fail to enter the low power state (BLE wake-up has been disabled). Is this a normal phenomenon? If not, what are the solutions? Issue 2: Before entering the low power mode, disabling automatic connection establishment allows the device to enter the low power mode normally. However, after waking up, attempting to re-enable automatic connection establishment fails (aci_gap_start_procedure(GAP_AUTO_CONNECTION_ESTABLISHMENT_PROC, LE_1M_PHY_BIT, 0, 0)). What is the solution for this problem?   I look forward to your replies. Thank you very much!

New question split from this post.One additinal request: When checking if bootloader pin configuration has an impact on the real application it would be helpful to know the default level for output pins, likedoes the UART_TX pin drive active high or low?does the boot loader drive the SPI MISO output pin HI, LO or Z?is the CAN_TX pin drven HI or LOW?Thank you!

Dear we working on safety critical application on railway. We are going to workout a FMECA analysis on our solution and I need further documentation on the STM32WLE5. At the begininning of the project we already signed an NDA with STM to get safety plan for another STM MCU. May we talk directly than I will send you a copy of the NDA ? Thanks a lot  

In official schematic MB1248 Rev-04 on SDRAM page:SDNE Connected to MCU pin PH6,SDNWE to PH5,SDCKE to PH7,When I create prject using TouchGFX template and open .ioc file in CubeMX or open SDRAM driver in CubeIDE the pins are connected as follows:SDNE to PB6SDNWE to PC0SDCKE to PB5My question is which is correct: Schematic or Code/.ioc file? 

Hello,I am using:Motor Control Workbench/X-CUBE-MCSDK 6.4.1 STM32G474RETx, 170 MHz EVLDRIVE102BH FOC with three-shunt current sensing A2212 13T, seven pole pairs I cannot find the High-Speed Observer, HSO, option in Motor Control Workbench.HSO is not visible or selectable in Motor Control Workbench. The same result occurs with a one-pole-pair, 24 krpm HKP Y0H0-A11 motor. Could you confirm:Is HSO publicly available in MCSDK 6.4.1? Is EVLDRIVE102BH supported? Which reference board should be selected? Is a particular MCU, motor type, sensing topology, or project type required? Is there a working HSO example project that I can import and run? Where exactly should HSO appear in the Workbench user interface?

Hi all,I have this kit but I don’t have any bolts holding the display PCB to the main PCB. I tried to look at the BOM for a reference to the part number but I don’t see anything for the bolts. I took one of the bolts holding the standoffs to the main PCB and it looks like an M4mm x 0.5 but I rather be sure before I order a few online. I have enough stuff that doesn’t match them and I rather not add more :-).Thanks

hi We are using the STM32F103CBT6 as the ST-Link controller in our new gateway board.In the first version of the board, the ST-Link did not work as expected. We have made some changes, and this is the second version of the board.Could you please review the ST-Link schematic section and let us know if there are any issues or recommended changes? Your feedback would be very helpful in ensuring that the ST-Link works correctly in this version.Thank you in advance for your support.