User Activity

Defining HSLV HSLV is a characteristic of certain I/O ports that allows them to operate at higher speeds while using lower voltage levels. This feature is particularly useful for applications that require fast data transfer rates without the higher ...
Introduction The delay block is an independent peripheral integrated within an STM32 MCU, for example, an STM32U5. Its role is to introduce a phase shift relative to the input clock. The user application configures the phase of the output clock. This...
Defining VCAP VCAP is the digital core supply provided by the internal LDO regulator. VCAP pins are present only on LDO packages (without SMPS). STM32U5 external capacitor on VCAP pin recommendations For the STM32U5 series, the external capacitor on ...
Introduction The purpose of this article is to provide some external memories tips and tricks, frequently asked questions, and a list for useful link resources.  1. Overall FAQs for QUADSPI/OCTOSPI/HSPI/XSPI  1.1. How to check whether a device is sup...
There are two possible solutions for connecting two quad-SPI memories using only one OCTOSPI interface. Solution 1: Use a dedicated bit in the OCTOSPI_CR register for external memory selection: MSEL bit for STM32H5, STM32U5, and STM32L5 series or FS...