void USART2_IRQHandler(void) called continuously for UART with hardware flow control with DMA

[noobmaster69]

I am using UART with DMA to communicate with nRF52833 with hardware flow control enabled. But while receiveing data, I get continuous interrupts and void USART2_IRQHandler(void) is called continuously.

I have enable RXNE interrupt so that I will know when data reception starts. I need this because I maintain state machine in my code and on reception of first byte, I change the state to RX_IN_PROGRESS and then, on RxCpltCallback, I change state to IDLE state.

My controller is STM32L031

My baudrate is 115200.

I am using STM32CubeIDE for my project on ubuntu.

I added following code in USART2_IRQHandler() but didnt help.

if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_REACK) == SET)
	{
		__HAL_UART_CLEAR_FLAG(&huart2, UART_FLAG_REACK);
	}
	if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_TEACK) == SET)
	{
		__HAL_UART_CLEAR_FLAG(&huart2, UART_FLAG_TEACK);
	}
	if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_TXE) == SET)
	{
		__HAL_UART_CLEAR_FLAG(&huart2, UART_FLAG_TXE);
	}
	if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_TC) == SET)
	{
		__HAL_UART_CLEAR_FLAG(&huart2, UART_FLAG_TC);
	}
	if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_IDLE) == SET)
	{
		__HAL_UART_CLEAR_FLAG(&huart2, UART_FLAG_IDLE);
	}
	if (__HAL_UART_GET_FLAG(&huart2, UART_FLAG_RXNE) == SET)
	{
		rx_uart_data = (uint16_t) READ_REG(&huart2.Instance->RDR);
		__HAL_UART_CLEAR_FLAG(&huart2, UART_FLAG_RXNE);
	}

Below is the screenshot of ISR register.

[waclawek.jan]

You can't use both DMA and interrupts at the same time.

You can switch between them, though; i.e. disable interrupt when received first byte and then start DMA; and then disable DMA and reenable interrupt when DMA finishes.

(Also, several of the ISR flags can't be cleared by calling __HAL_UART_CLEAR_FLAG (which does nothing just writes into ICR), but that just simply does nothing).

JW

[noobmaster69]

But before I was usng UART withut hardware fow control and it didnt give me any problems. I had enabled RXNE interrupt at that time also. Then, why this is happening now? Ofcourse I was uisng DMA at that time also.

[waclawek.jan]

Do you have enabled interrupt upon CTS in USART_CR3.CTSIE?

JW

[Guenael Cadier]

Hi @Community member​ 

As already mentioned by @Community member​ , some flags in ISR could not be cleared by write operations in ICR. For instance, TEACK, REACK are only status bits and are not generating interrupts, they could not reset by ICR updates.

Regarding TXE bit, it is cleared when some data is written in TDR.

WHat is the content of your TXEIE bit in CR1 ? If TXEIE is enabled, TXE set to 1 in ISR will generate interrupts until TXEIE is 0 or TDR ids filled with data to be sent ...

Regards

[noobmaster69]

No. I had only enabled RXNE interrupt.

SB