STM32H7 dual core debugging

[LBeau.1]

What is ST's response to this document and the fact that I am witnessing such behaviour (see image) ?? Was there simply an error in this document? I was following the doc only to be frustrated by M4 hitting a brick wall with SIGTRAP, there is mention of "option bytes" by user TDK here. Is thee something that I am missing and I can edit these option bytes in either STM32cubeIDE or CUBEMX or is this strictly a CubeProgrammer ability? BOOT_CM4=0 in the option bytes??? Where is this?? Can I change this Via GUI interface?? Should I proceed and think nothing of it and consider this error in document?

Please clarify... Thank you.

https://community.st.com/s/question/0D53W000003MxVD/debugging-stm32h7-dual-core

https://www.st.com/resource/en/application_note/dm00629855-getting-started-with-projects-based-on-dualcore-stm32h7-microcontrollers-in-stm32cubeide-stmicroelectronics.pdf

[LBeau.1]

hello?

[LBeau.1]

hello?

[LBeau.1]

hello st

[LBeau.1]

hello

[BSpoe.1]

I'm not from ST but what is the problem with debugging? Are you not able to debug one core?

I don't understand what's with the document.

[LBeau.1]

In the document, "none" for reset method should be chosen for debugging the CM_4. CM_7 should have "connect under reset". I chose "connect under reset" for both.

The CM_7 will release the CM_4 in software. But I dont notice this.

[BSpoe.1]

Are you trying to debug both cores at the same time?

[LBeau.1]

Not really, I was just trying to understand the exact mechanism at play according to ST's documentation.

I have seen not much video proof of a working workflow.

[LBeau.1]

st?

Yes I can debug... But can you make your documentation not error prone next time? Or do I not understand you?