Introduction As with many microcontrollers, STM32 MCUs could be clocked by an external source like crystals (XTAL) or crystal oscillators (XO). This is in addition to internal clocks such as LSI, HSI, MSI, CSI etc. For crystals, a preliminary calcula...
Summary This article provides a step-by-step guide on how to configure your STM32H7R/S to transfer ADC converted values in DMA circular mode using STM32CubeMX (version 6.12 is used). For a complete firmware example, refer to the attached project a...
Introduction In this article, we go through the necessary steps to create a working UDP echo server for the STM32F767 MCU. This demo is applicable to other F7 series microcontrollers with some minor differences in memory addresses depending on the m...
Summary This article allows the process to regress from RDP 2 to RDP 0 on the STM32U5 series. This example uses the STM32U5 Nucleo board with STM32U5A5ZJT6Q and STM32CubeProgrammer V2.13.Note:To regress from RDP2 to RDP0, you must be sure that your ...
Summary and problem description The STM32WL55 is a dual-core, low-power microcontroller with a sub-GHz radio that is connected internally through SPI. Note that whenever "radio" is mentioned in this article, it relates to "sub-GHz radio". To enhanc...
Introduction Since CMSIS V 5.8.0, the CMSIS-DSP libraries are supplied as an individual package. The advantage is to decouple the release cycles of DSP from the CMSIS-Core stuff. As a side-effect, the DSP libraries structure was changed and the step...
Summary This article continues the practical guide on integrating and debugging external memory with STM32 MCUs, focusing on firmware configuration, initialization, and comprehensive validation techniques. It highlights key firmware settings, middle...
Summary This article addresses the critical process of integrating and debugging external memory on STM32 microcontrollers, emphasizing a systematic approach that integrates hardware verification, firmware configuration, and validation. It highlight...
What is the ST product longevity commitment program? The ST product longevity program is a formal commitment by STMicroelectronics to ensure the long-term availability of ST products for a defined period of 7, 10, 15 or 20 years. STM32 product longev...
Summary In the STM32H7 dual core series (STM32H745/755 and STM32H747/757), some resources are shared and must be initialized only once. This is notably the case for the clock tree. For this purpose, one core waits while the other performs the necessa...
Introduction In the field of embedded systems, it is very common to migrate an existing design from one STM32 microcontroller to another in response to changing application requirements. These changes can be dependent on, for example, flash memory, S...
Summary This article examines cache coherency issues specific to STM32 high-performance microcontrollers, describes the reasons behind their occurrence, and outlines how the memory protection unit (MPU) serves as the primary tool for configuring memo...
Summary This article shows how to integrate Mbed TLS with hardware acceleration offloading benefiting from embedded hardware crypto engines (AES, PKA, HASH). Introduction The STM32H5 series is a powerful microcontroller family that benefits from ha...
Summary To understand how middleware like NetXDuo and LwIP use the STM32 HAL Ethernet driver, this article demonstrates a bare metal application to send and receive Ethernet frames. If you are not interested in following the step-by-step tutorial you...
Summary The first stage bootloader (FSBL) is a key component in the boot process of STM32N6 microcontrollers. It is responsible for initializing the system, configuring the hardware, and loading the application code from external memory into the int...
Summary This article aims to introduce STM32 developers to the basics of CMake, focusing on practical use cases that simplify the learning curve and help avoid common pitfalls during onboarding. SummaryIntroduction1. Why learn CMake for STM32 devel...
Problem Backup SRAM or normal SRAM content is not preserved after reset or wake up from standby. After a reset, the last few bytes written are not kept. Solution This issue appears on STM32 devices that have ECC (Error Code Correction) on internal ...
Introduction The quad-SPI (QUADSPI), Octo-SPI (OCTOSPI), hexadeca-SPI (HSPI), and XSPI interfaces can operate in two different low level protocols: Regular-command and HyperBus. The Regular-command protocol is the classical frame format where the QUA...
Introduction Many users have questions about the relationship between the FDCAN registers: FDCAN_IE, FDCAN_ILS, and FDCAN_ILE in certain STM32 microcontrollers such as the STM32H5 and STM32G4 series etc. This article explains how interrupt grouping ...
Introduction The CAN-FD protocol implements a robust error management mechanism, which is fully implemented in hardware. It is reported mainly by two counters in the same way as CAN2.0 (bxCAN in STM32): Transmit error counter (TEC)Receive error count...
