The main objective of this article is to present STM32H7 SSCG feature and firmware implementation thanks to the embedded PLL fractional PLL not show in the already existing application note AN4850.
Hello Remoter,
I suggest you base yourself from an existing example, in STM32CubeF3 package for example you have examples for both polling and interrupt mode for the TSC feature on the eval boards examples. It is easier to follow or debug.
If you wan...
Hello Lance,
Yes PB2 should be used as either an active shield or sampling capacitance only depending on the package you have and that is why you see a longer pulse.
For the 2Mhz you should be fine
Regards,Stassen
Hello Jason,
You are right there is a missing information here :
The timer triggers the first DMA channel to copy a value from a table describing the waveform to the PLL2FRACR.The timer triggers the second DMA channel to copy two values from memory t...
Hello sbhowmick94,
The default state of the nBOOT1 bit for BOOT configuration is set to 1, it's written in the RM0351 :
https://www.st.com/resource/en/reference_manual/rm0351-stm32l47xxx-stm32l48xxx-stm32l49xxx-and-stm32l4axxx-advanced-armbased-32bit...
