STM32WB : RTC_BKP registers are undefined

[NSAUG.1]

Hello,

While using the RTC_BKP registers with HAL_RTCEx_BKUPWrite seems all right, the definition of the registers in stm32wb55wxx.h are not. Maybe they should not be present, or they should be fixed, but having symbols defined that do not lead to what their name suggests doesn't look right to me.

/********************  Bits definition for RTC_BKP0R register  ****************/
#define RTC_BKP0R_Pos                  (0U)
#define RTC_BKP0R_Msk                  (0xFFFFFFFFUL << RTC_BKP0R_Pos)         /*!< 0xFFFFFFFF */
#define RTC_BKP0R                      RTC_BKP0R_Msk                           /*!< RTC backup register 0 */
 
/********************  Bits definition for RTC_BKP1R register  ****************/
#define RTC_BKP1R_Pos                  (0U)
#define RTC_BKP1R_Msk                  (0xFFFFFFFFUL << RTC_BKP1R_Pos)         /*!< 0xFFFFFFFF */
#define RTC_BKP1R                      RTC_BKP1R_Msk                           /*!< RTC backup register 1 */
 
/********************  Bits definition for RTC_BKP2R register  ****************/
#define RTC_BKP2R_Pos                  (0U)
#define RTC_BKP2R_Msk                  (0xFFFFFFFFUL << RTC_BKP2R_Pos)         /*!< 0xFFFFFFFF */
#define RTC_BKP2R                      RTC_BKP2R_Msk                           /*!< RTC backup register 2 */
 
/********************  Bits definition for RTC_BKP3R register  ****************/
#define RTC_BKP3R_Pos                  (0U)
#define RTC_BKP3R_Msk                  (0xFFFFFFFFUL << RTC_BKP3R_Pos)         /*!< 0xFFFFFFFF */
#define RTC_BKP3R                      RTC_BKP3R_Msk                           /*!< RTC backup register 3 */
 
/********************  Bits definition for RTC_BKP4R register  ****************/
#define RTC_BKP4R_Pos                  (0U)
#define RTC_BKP4R_Msk                  (0xFFFFFFFFUL << RTC_BKP4R_Pos)         /*!< 0xFFFFFFFF */
#define RTC_BKP4R                      RTC_BKP4R_Msk                           /*!< RTC backup register 4 */

Cheers,

Nicolas

[Piranha · Accepted solution]

What's not present?

/**
  * @brief Real-Time Clock
  */
typedef struct
{
  // ...
  __IO uint32_t BKP0R;      /*!< RTC backup register 0,                                     Address offset: 0x50 */
  __IO uint32_t BKP1R;      /*!< RTC backup register 1,                                     Address offset: 0x54 */
  __IO uint32_t BKP2R;      /*!< RTC backup register 2,                                     Address offset: 0x58 */
  __IO uint32_t BKP3R;      /*!< RTC backup register 3,                                     Address offset: 0x5C */
  __IO uint32_t BKP4R;      /*!< RTC backup register 4,                                     Address offset: 0x60 */
  __IO uint32_t BKP5R;      /*!< RTC backup register 5,                                     Address offset: 0x64 */
  __IO uint32_t BKP6R;      /*!< RTC backup register 6,                                     Address offset: 0x68 */
  __IO uint32_t BKP7R;      /*!< RTC backup register 7,                                     Address offset: 0x6C */
  __IO uint32_t BKP8R;      /*!< RTC backup register 8,                                     Address offset: 0x70 */
  __IO uint32_t BKP9R;      /*!< RTC backup register 9,                                     Address offset: 0x74 */
  __IO uint32_t BKP10R;     /*!< RTC backup register 10,                                    Address offset: 0x78 */
  __IO uint32_t BKP11R;     /*!< RTC backup register 11,                                    Address offset: 0x7C */
  __IO uint32_t BKP12R;     /*!< RTC backup register 12,                                    Address offset: 0x80 */
  __IO uint32_t BKP13R;     /*!< RTC backup register 13,                                    Address offset: 0x84 */
  __IO uint32_t BKP14R;     /*!< RTC backup register 14,                                    Address offset: 0x88 */
  __IO uint32_t BKP15R;     /*!< RTC backup register 15,                                    Address offset: 0x8C */
  __IO uint32_t BKP16R;     /*!< RTC backup register 16,                                    Address offset: 0x90 */
  __IO uint32_t BKP17R;     /*!< RTC backup register 17,                                    Address offset: 0x94 */
  __IO uint32_t BKP18R;     /*!< RTC backup register 18,                                    Address offset: 0x98 */
  __IO uint32_t BKP19R;     /*!< RTC backup register 19,                                    Address offset: 0x9C */
} RTC_TypeDef;

A better question is why the RTC backup registers are not defined as an array like for some other registers:

/**
  * @brief System configuration controller
  */
typedef struct
{
  // ...
  __IO uint32_t EXTICR[4];         /*!< SYSCFG external interrupt configuration registers,                      Address offset: 0x08-0x14  */
  // ...
} SYSCFG_TypeDef;

 @Imen DAHMEN​, this could be improved.

[NSAUG.1]

Ok, I see my mistake. I was indeed not looking at what I thought I was looking at.

[Imen.D]

Hello,

As HAL user point of view, it changes nothing because you use the following functions:

 * HAL_RTCEx_BKUPRead(Backup_Index)
 * HAL_RTCEx_BKUPWrite(Backup_Index)

when doesn't use the HAL and directly the CMSIS file definitions, you can access to the specific RTC BKP register like this:

address_reg = (uint32_t) &(hrtc->Instance->BKP0R);
address_reg += (Backup_Index * 4U);

With the change, you will access to the register directly with the offset without to perform any addition:

address_reg = (uint32_t) &(hrtc->Instance->BKPR[x]);

So, I think It's not worth changing the CMSIS file and the RTC driver and breaks the compatibility with others series.

Imen

[Piranha]

If one is competent in C language, then currently it can be done like this:

value = ((volatile uint32_t *)&hrtc->Instance->BKP0R)[index];

With the change it would be like this:

value = hrtc->Instance->BKPR[index];

But, of course, let's not fix or improve anything, because it can break compatibility with something broken or suboptimal.