STM32L151RC GPIO BRR register missing?

[hugo1]

Hi,

to clear bit 7 in port C I used a write to the BRR register: GPIOC->BRR = 0x00000080. Did not clear bit 7. A write to BSRR works: GPIOC->BSRR = 0x00800000. Is the BRR register not implemented (seems kind of redundant anyway with having BSRR)? It certainly is included in the header file. Could not see anything in the Errata sheet either. Or am I missing something?

Kind Regards,

[After Forever]

From the reference manual (RM0038):

GPIO bit reset register (GPIOx_BRR) (x = A..H)

These registers are available on Cat.3, Cat.4, Cat.5 and Cat.6 products only.

[hugo1]

Yes, I know that. According to the table on page 40 of the data sheet the STM32L151RC is a Cat.3 device.

[hugo1]

[waclawek.jan]

What's the value of DBGMCU_IDCODE ?

JW

[hugo1]

Hi,

DBGMCU->IDCODE is 0x10f86427

Kind Regards,

[Imen.D]

Hello,

BRR register is not in Cat.3.

The reference manual RM0038 will be updated to correct in chapter: "7.4.11 GPIO bit reset register (GPIOx_BRR) (x = A..H)":

- Remove "Cat.3" from description. So final sentence should be: These registers are available on Cat.4, Cat.5 and Cat.6 products only.

I raised this issue internally for fix.

Thanks,

Imen