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What is up with STM32H563 ADC INP0?

Dimlite
Associate III

Hi,

I am not able to get a correct reading from ADC1 INP0 (PA0). All the other analog channels works fine.


The datasheet mentions this:

ADC option register (ADC_OR), option bit 0 (OP0)

For ADC1:

0: INP0/INN1 GPIO switch control disabled

1: INP0/INN1 GPIO switch control enabled

Note:This option bit must be set to 1 when ADCx_INP0 or ADCx_INN1 channel is selected.


The expected value is 2048, but I get 4095 when OP = 1, and 3433 with OP0.

The input has a 2 k resistor in series, and I measure 1.5 V (correct) on the far side, and 1.3 V on the side directly connected to the input.


Please see attached file, which is from the datasheet for RGT6. I don't know how to interpret the table. Is option register implemented or not regarding ADC1?


What is the purpose of the option bit, and what am I missing here?

4 REPLIES 4

What board(s) are you using?

See: https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

It is a custom board.

The show the schematic - which was point #3 in the posting tips:

https://community.st.com/t5/community-guidelines/how-to-write-your-question-to-maximize-your-chances-to-find-a/ta-p/575228

 

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

Though I doubt this is related to the external HW, please see attached file.The schematic consists of multiple pages that I can not share. To the right you see the LP-filter mentioned above (2k + cap). This is connected to PA0, though not on this page.