2020-06-17 07:54 AM
Have several boards with problems keeping time accurately. We calibrate each board in factory test, but some boards have very large errors in the 1 Hz calibration signal and very jittery frequency readings. To make it more interesting, when there is less activity on the PCA the calibration clock output tends to stabilize at a frequency that can be calibrated.
We have tried changing the 32 KHz crystal and load cap's, but that does not seem to have any effect. Boards that exhibit this problem can loose several minutes of time in 24 hours - not acceptable for a modern clock!
Clues:
Anyone have any ideas what we can try to get around this problem? Thanks for any advice here!
2021-04-01 05:22 AM
Here is a summary of what I found working with the H7 RTC 32KHz oscillator before I put this chapter of my life behind me.
Here is my setup:
Here is what I have learned:
2021-04-03 04:47 PM
I agree with you. That people have scrupulously cleaned the board to get the clock working is crazy stuff. Unless you seal a board hermetically in its working environment it is going to get "dirty" thus potentially stopping the clock.
I used a H7 for use as a precision mains power voltage and current monitor, luckily I used a GPS module to generate the clock and various references. The GPS basically sets the H7 RTC Time/Date registers and syncs it with a 1 Hz GSPDO.
I had the same problem with calibration that you did. I also found that when the board is powered up the clock sort of works's but run it on VBat and it loses time chronically like seconds in a few minutes. I suspect that this is due to drop-outs and restarts, but without the CPU running it's difficult to know. Putting a scope probe on the xtal doesn't seem a valid measurement with such a dodgy clock.
I also couldn't make any sense out of the 512 Hz cal signal; it seemed to be running at 434 Hz. Weird! I didn't bother with the 1Hz signal. I kind of gave up at this point.
I wish ST would address the problem and fix it. Adding a decent external clock is a pain.
2021-04-04 03:33 AM
> That people have scrupulously cleaned the board to get the clock working is crazy stuff.
The "watch" oscillator is an ultralow-consumption analog circuit, so you have to treat it as such. It's easy to create a robust high-power oscillator (well, the crystal would need to be built to withstand that, too; possible but there's no reason to do that); except that you wouldn't be able to run your RTC from a coin cell for months, and this is not what most users want.
In fact, you *CAN* run the RTC out of HSE on most of the STM32 families (I don't use the 'H7). And HSE, while still analog and still needs relatively careful treatment, is usually more robust than LSE; but logically there are no low-power facilities available for that.
> Putting a scope probe on the xtal doesn't seem a valid measurement with such a dodgy clock.
That is of course related. Typical passive oscilloscope probes represent typically 1MOhm and a couple of pF (or using 1:10 probe representing maybe around 10MOhm but few tens of pF), which is WAY too high a load to the typical LSE circuitry. There are active probes around which you can use to probe such circuts, but they are usually at the higher price range; and still it's a nontrivial thing to do without influencing the given circuit too much.
> without the CPU running it's difficult to know
You can output LSE to MCO in some families; again, I don't know about the availability of this on 'H7. Not in VBAT mode, though; but maybe in some low-power modes it may be available; check the RM.
> Unless you seal a board hermetically in its working environment it is going to get "dirty" thus potentially stopping the clock.
If you are concerned about [conductive] "dirt" (or, for that matter, humidity condensation or other environmental impact), consider using some form of conformal coating.
> I also couldn't make any sense out of the 512 Hz cal signal; it seemed to be running at 434 Hz.
I don't say the 'H7 are flawless, but I find it unlikely it wouldn't work at all.
> I also had trouble with a Discovery STM32H7B3I-DK.
That's disappointing indeed as those boards are supposed to be "known good", and I'd love to hear from ST in this regard (but won't hold my breath, ST almost never comments here on more complex technical issues); but again it's an overly complex board with too many sources for disturbance. Try maybe with a simple program with nothing else running (mainly no LCD and external memory) but the RTC and some suitable output pins. Or, if you have one at hand, try with a simpler Nucleo board.
> Even with "good" boards, the RTC calibrate frequency jumps around (with calibration turned off) by about 0.0001 Hz, making it difficult to know the exact calibration value to use.
The 'H7 is primarily a massive digital circuit built on a 28nm technology; I believe the analog performance on such an IC is a matter of heavy tradeoffs. Even with perfect 32kHz oscillations, I would expect variation in the input comparator threshold resulting in jitter in the order of say quarter of the 32kHz oscillation period, i.e. around 8us. That would exhibit itself as 8ppm jitter at 1Hz, whereas your finding is an order of magnitude higher, around 100ppm. Still assuming perfect 32kHz oscillation, maybe this is the contribution of the asynchronous part of the divider. I understand your frustration, but would you be willing to experiment further, maybe you could try to measure over a longer period.
JW
2021-06-10 08:22 AM
Hi,
I had issues with the RTC which would lose around 1sec per minute when other peripherals were running.
In my case, lowering the oscillator capacitors did the trick (clearly, I had it easy compared to others!)
I am posting my setup so that it can be re-used.
Here is the board setup:
4 Layer board, 1.6mm:
As you can see in the pictures above, the SDRAM and the LCD tracks are all around the osc32 signals. However, most of them are on a different layer and separated by the ground plane (not visible in the pictures).
I do not have guard around the oscillator and there is no copper flooding under it.
The oscillator tracks are 20mm long.
The ground and power layers are not split under the oscillator signals.
Oscillator capacitors are connected by a common via to the ground plane.
There is no ground separation with the other devices, but there is appropriate decoupling located less than 3mm of each power pin.
I hope it can help!
2021-06-10 09:07 AM
If I understand, the oscillator comes out as a pair, goes below then comes back to the top, then the pair terminates at the capacitors then tracks a little more to the crystal. No doubt adding PCB capacitance, which you adjust for by reducing the values of the capacitors. I would have tried to keep everything closer to the uC pins (or at least the capacitors closer) but that is interesting you show that the oscillator is much more tolerant than any manufacture would admit to. Also that you use the port pins on either side of the oscillator pins rather than connect them to 0V to form a guard ring.
I thought microcontrollers were more tolerant as you have proven. Thanks for the tip. I rarely get work so I write web or blog pages on electronics so I like to use your pictures on my blog, not sure where just now but to show how robust the oscillator is.
https://blog.andrew-lohmann.me.uk/2020/09/electronics-design-project-bicycle.html
2021-07-20 04:55 AM
I got excited when I read your post and tried similar value crystals and cap's. Unfortunately, it just lowered the RTC frequency on three boards to 0.8xxx Hz - WAY off 1.000000 Hz.
Thank you for posting you results, just wish it worked better for me!
2021-07-20 05:39 AM
There's no way a crystal oscillator to run 20% off its nominal frequency - at that point, it was not a crystal oscillator anymore.
Have we already discussed your ground and VDD arrangement/supply/routing/decoupling?
JW
2021-07-20 06:18 AM
2021-07-20 06:43 AM
It appears you have a ground layer. How does it look like? Is it uninterrupted between the vias from C157/C158 and the GND pin closest to the xtal pins? (note the common via in franck23 ' s post - a nice way to reduce unwanted parasitics, although not critical).
What is the power supply arrangement? What is the power supply voltage? Is VDD/VSS as measured at the closest pins to the crystal pins rock stable?
How is VBAT connected exactly?
JW
2021-07-20 07:07 AM
The ground plane is cut out under the crystal per the ST app notes, though that did not seem to help anything (was a solid ground plane in earlier versions). Ground layer turned on in the attachment so you can see what I mean. Power supply is 3.3V and looks clean to me. I have a 2.2uF and a 0.01 uF cap on VBATT by the CPU. VBATT comes from a 2032 battery through a diode and 1K resistor. This is really a moot point at this time, I've already added an external RTC to get a reliable clock. I do appreciate the feedback, though.