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STM32F205 USART2 Long zero level in tx transmitting

Dmitry Solynin
Associate II

I use USART2 for connect whith gsm module.

When trafic is big enough some byte in transmitting from cpu to modem can be corrupted.

It may be happen one time in few minutes.

I see corrupted byte by signal analisator. And the same corruption i see on the server side.

Problem has occurred in the middle of the packet (not beginning and ending bytes).

I have used different methods for transmitting - interrupt, interrupt only by tx compit, dma.

All methods have the same result.

I have impression that Usart is switced off, or ahb frequency has changed for some ms.

But i can't imagine in which place of code it can be.

TX pin is setup for output high level, So if Usart is switched off logical one must be on tx.

Boud rate is ok. 

I don't understand what can be cause of that behavour. How USART TX pin can be in low level so long time (more than byte duration)

CTS control is used. I have tried hardware and sowtware flow control. Issue is in both cases.

0690X00000BuhXxQAJ.png

6 REPLIES 6
Jack Peacock_2
Senior III

What are you using for the clock source, HSE, HSI? If HSE, do you have CSS enable to detect a clock dropout?

Did you check to make sure you're not sending a BREAK?

Jack Peacock

I'd say, short to a neighbouring pin/track.

JW

Dmitry Solynin
Associate II

Hi. Thanks for answers!

I use HSE and PLL. Clocking sceme is in attach.

clock dropout is a good idea! I didn't suppse that it can be at all. When I switch on CSS usart is failing more faster, and doesn't return in normal mode.

I don't use sending breaks. I am sure. And low levels can be more longer than breaks. Long ones can be too.

I doubt It can be short between neighbouring pins. It occurs on different devices. And different types of devices.

0690X00000Bujw1QAB.jpg

Dmitry Solynin
Associate II

Yes. NMI is called when CSS is on.

So MCU is acting from HSI in that case and USART works on another speed constantly.

Why could be clock drops? What could be cause?

I suppose when HSI is switched by CSS switching back to HSE doesn't work automatically. Is it true?

Dmitry Solynin
Associate II

Good day!

The problem was solved by changing PLL settings.

0690X00000BuoZgQAJ.jpg

CSS doesn't detect clock dropouts after that.

But It is strange enough.

CSS detects HSE failings.

We have changed pll settings. Could pll settings have affection on HSE?

Indirectly, through VDDA.

Review power supply, VDD/VDDA and grounding arrangement.

Review the crystal circuitry, check whether capacitors are adequate to the used crystal. 25MHz is at the upper edge of HSE usability and is quite a high frequency for a crystal, maybe you would want to use a lower frequency crystal for stability.

JW