2018-12-31 04:29 AM
In the reference manual STM32H7 (version July 2018) in chapter 37.1 - figure 343 for the clock source it says "CK_TIM18 from RCC".
Problem: If I look for "CK_TIM18" in the complete manual, this name appears ONLY ONE TIME, here in this chapter 37.1 figure 343. This is not very helpful of course.
I appreciate that you have so many clocks in this controller, this really can make sense, but please try to explain it in a way that it is possible to understand this, especially for such important peripherals as timers.
From STM32H743xx.h RCC_APB2ENR definitions I see, that TIM1 and TIM8 are connected to APB2. If I look further into RCC 7.5.8 Figure 45, then there I find a naming "rcc_timy_ker_ck", which seems to be equal to "rcc_pclk2" (but NOT really clear from this drawing). Max. frequency here unfortunately NOT specified. Only I recognize max. hclk frequency of 200MHz, but this before the D2PPRE2 divisor.
If I then look further in the table 55, I find a spec for "TIM[8:1], TIM[17:12]" (this I think should better mean [TIM1-8],[TIM12-17]), there it says "max. 200 MHz". Just this Table 55 seems to have some contradiction, as e. g. USART1 also is connected to APB2, and there it says "max. 100MHz".
As I see it from the RM, it is not really clear whether it is possible to operate the APB2 with 200 MHz or not ... but as in the datasheet 3.29 it says, that all timers may be operated with 200MHz, I assume it is safe to operate APB2 with 200MHz.
... just somehow this should be clearly stated in one of the RCC figures in RM RCC chapter...
I would propose the following updates for Figure 45:
- mark the max. frequency also for all the peripherial busses there clearly.
- If this APB2 frequency is only max. 100MHz, if e. g. USART1 is switchted on, then please also mark this there clearly (maybe using some (*) footnote).
- if possible please somehow, at least in some footnote, make a connection to the "CK_TIM18" name which you use in the timer description (in the Tim2-Tim5/TIM6-7 chapter, you use "TIMxCLK from RCC", in the TIM12-TIM14/TIM15-17 chapter you use "Internal clock CK_INT", inone of these ck names are found the RCC chapter, this is quite messy to my impression...)
Further please avoid to renumber the reference manual. Some "funny guy" from May 2017 to July 2018 must have removed the chapter "5 AXI Interconnect" - I think this was included in chapter 2 now ... so now all numbers in the reference manual changed, this is EXTREMELY annoying for any code documentation ... please avoid this in future, I hope.
2018-12-31 04:42 AM
Sorry, only now I just recognized this "Table 52" under Figure 45 ... this I think clarifies the relationship between ABP and TIM clocks ... but it would be really nice, if the timer clocks given in the timer sections "ck_tim18", "timxclk" and "ck_int" somehow would appear hear (or you add the terms "rcc_timx_ker_ck" and "rcc_timy_ker_ck" to the timer description sections in the correct way... . And it would be nice, to add an explanation sentence to Table 52: "Timer clocks max. 200MHz, PClk1, PCK2 max. 100MHz" ... or something like this.
2018-12-31 05:23 AM
unfortunately the reference manual is common to an STM32 family (hence does not put absolute numbers such as 200MHz...). The absolute numbers, pinout and memory map (the specifics to a part number) is in the datasheet. Maybe we can dream of a PDF customized datasheet builder in CubeMX to focus on less pages? Easy said...
Anyway it is right to make the spec easily readable by most users, so edit efforts would be welcomed
2018-12-31 06:20 AM
Hi @flyer31 ,
Thanks for bringing these discrepancies to our attention.
Just give us some time to analyze your feedback and review the relevant reference manual, then we will manage the update if needed.
-Amel
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2019-01-02 08:12 AM
Dear @flyer31 ,
Many thanks for your feedback!
This is internally reported and will be rectified in the new release of the reference manual.
- "rcc_timy_ker_ck" is the timer clock.
- "rcc_pclk2" is the APB2 Peripheral clock.
Details are explained in table 52.
If you need further clarifications, please do not hesitate to share your feedback here in our STM32 MCUs community.
Khouloud.
2019-01-12 08:12 AM
The same also applies to the USART baud rate generation: In RM 47.5.7 it uses the term "usart_ker_ckpres". But term is used ONLY within these 10 lines of the RM ... this of course again is not very helpful.
Looking in my favourite RCC figure 45, I guess this should be rcc_pclk2 (I look for USART6 .. and USART6 seems to be on APB2, as the RCC en flag is named RC_APB2ENR_USART6EN).
To my surprise looking for "usart_ker" I just found a further nice Figure 49 ... concerning clock handling the RM really is full of surprises :).
2019-01-12 08:35 AM
... I think here only the "_" is missing, It should write "usart_ker_ck_pres" in the Baudrate paragraph 47.5.7, then all would be much clearer.
Further I think the main application for USART is using rcc_pclk2 ..., and this in many user applications will run with the maximum speed of 100MHz. It would be nice to add an "Example 3" here, where the BRR value is given for this "typical speed" of 100MHz. I think then the baudrate has not 0% error, but as I calculate it, the error is only 0.5/10000, so < 0.1% ... so perfectly fine ... for any new user this "example info" really would be very helpful I think.
2019-01-12 09:09 AM
Further I think in the Baudrate formula in RM47.5.7 a factor 2 is missing.
I am quite sure, that my APB2 is running at 100MHz, but I have to use the forumulas:
BRR=100000000*2/9600 (if OVER8=0)
BRR=100000000*4/9600 (if OVER8=1)
... maybe check ...
2021-05-04 11:45 PM
Please change the CK_TIM18 error also in the STM32F446 Reference Manual. Please see figure 110 on page 449 of the manual...
2021-05-04 11:55 PM
Addendum: I see more weird things in the figure:
CK appears to be a clock signal. If this is so the convention is to use CLK instead of CK. So the signal should be called CLK_TIM1|8. Please NEVER use CK. It is very confusing and I have never seen this notation used in more than 30 years i have been working with electronics!
Furthermore if the signal is followed something odd happens: CK_TIM18 attaches to the arrow which has the supertext Internal Clock (CK_INT). Since this is the same node the name of the signal has to be the same. In this case it should be CLK_TIM1|8. The CK_INT (which should be CLK_INT!) is the signal internal to the box surrounding 'Trigger Control', 'Slave Mode Controller' and 'Encoder Interface'.
Furthermore: CK_PSC should be CLK_PSC (in the middle area of figure 110).