How to connect 8 SRAMs to STM32H7

[kazutobi]

Hello everyone.

I want to connect 8 SRAMs (2MB) to STM32H755XIH3 and use them as 16MB work memory.

When connecting 8 memories (SRAMs) using FMC (devices more than the number of FMC_NE*), how should I connect and control them? If there are any similar cases, I would appreciate your advice.

I am currently considering it, but I have some conditions.

1. I will use Infenion's CY7C1061GE30-10BVJXIT (2MB) with dual chip enable for the SRAM.

2. Of the 4 NEs in the FMC, 2 will be used to connect other memories, so only 2 can be used for SRAM.

Thank you in advance.

[SofLit · Accepted solution]

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@kazutobi wrote:

The SRAM I'm trying to use has two chip enable terminals.
I was thinking of doing it without a decoder. I don't know if that's possible though.

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Two chip enable is to enable the memory itself.  You need to use one and fix the another. You need as @Tesla DeLorean said an address decoder like the old TTL "74138" to address 8 memories. Each 74138 output will drive a chip enable of a memory. The address decoder is driven by the Higher address lines.

This is an old concept. So for example this link: https://ece-research.unm.edu/jimp/310/slides/8086_memory2.html

[kazutobi]

Hi LCE

Thank you very much.
I will consider whether HYPERRAM matches our system.
It is true that pattern design for 8 SRAM is troublesome.
Thank you for the useful information.

[kazutobi]

Hello

Thank you very much for the detailed explanation. And thanks for the link.
I understand that I need an address decoder, as @Tesla DeLorean  told me.
I will continue to consider whether to go with 8 SRAMs or use the HYPERRAM that @LCE  told me about.

　

[kazutobi]

I'm commenting because "Accept as Solution" is not displayed.
I accept your answer. Thank you.