Forcing a FLASH ECC error on a STM32G4

[DreamOnDirac]

Hi

Earlier today I was demonstrating a IAP functionallity with dualbanking on a stm32G474RET. I was saying that it cannot fail as I check the written image with a CRC after it has been written to the new bank.

As I power of the system mid transfer and power it up again, I experience the what we now all expect. It obviously failed.

My system no longer boots normally and as i start to debug it i see that i get a NMI. Now, I unfortunately did not record all the relevant register values, but i am pretty sure that what was set was FLASH_ECCR, bit ECCD. I know this because i see that the NMI trigger as i am doing a boot blank check and CRC on both my banks and the NMI triggers while i am reading from the bank i was writing to.

I have now written a suitable NMI handler to deal with this situation in the future, but how can I intentionally force a double ECC error in a given address in flash?

Best regards

Martin

[TDK · Accepted solution]

Some discussion and good ideas here:

https://community.st.com/t5/stm32-mcus-products/stm32l476-how-can-i-create-an-ecc-error-to-test-my-error/td-p/396688

[DreamOnDirac]

Hi TDK and thanks for the suggestion.

I ended up doing the same thing as that thread suggested. After around 60 attempts cut power while programming the flash, the error triggered.

I got "lucky" after that and the next time i needed to trigger it it took only 27 attempts.

// Martin

[TDK]

Haha, well thanks for reporting back. Good to know it works even if it's a bit time consuming to test. Wonder if it's a timing thing, where if you cut power at the exact same time relative to programming, it would happen every time. Just guessing.