2024-06-25 07:51 AM - last edited on 2024-06-25 08:04 AM by SofLit
Hello,
I am writing FDCAN driver filtering function for the open source ChibiOS RTOS, both for FdCanV2(H7) and FdCanV1(G4)
For the H7 side, all went easy, and the driver works as intended. On the G4 side, FdCanV1 is a bit simpler (the ram buffer is not shared between interfaces, and sections size are fixed) so it should be even easier, but that's not the case and I am unable to filter.
What I do to enable filtering is :
° enable configuration change : setting FDCAN_CCCR_CCE | FDCAN_CCCR_INIT in CCCR register
° setting fields in RXGFC register : reject non filtered frame, and setting number of filters
° setting filters in the ram buffer at the SRAMCAN_FLESA position, in my case for FDCAN1 interface, it is 0x4000a5c0 for extended filters
° removing FDCAN_CCCR_INIT in CCCR register
° using debugger, I tested that RXGFC has the expected value, and that ram buffer contains the expected filters
° XIDAM global mask is left at init value (no global masking done)
Without filtering, I receive frames, but when I set the filtering, I receive nothing.
I tried to put only one receive ANY filter for EID frames: ID+Mask filter with 0x0 mask, dispatch on FIFO0, but nope, nothing.
for this exemple, I have these values for the filter ram buffer : {[0x0] = 0x20000000, [0x1] = 0x80000000}
and RXGFC is 0x100000a
Thanks for any hints
Alexandre
A
Solved! Go to Solution.
2024-06-26 05:31 AM
Thanks for the advice, PBCK : I found the problem, *** pointer arithmetic in the calculus of the filter ram address in my code. G4 FDCAN filter works as intended :)
2024-06-25 08:03 AM
Hello,
Best way is to inspire from the G4 HAL/Examples provided in the STM32CubeG4:
2024-06-26 05:31 AM
Thanks for the advice, PBCK : I found the problem, *** pointer arithmetic in the calculus of the filter ram address in my code. G4 FDCAN filter works as intended :)