2024-08-21 03:02 AM - edited 2024-08-21 06:15 AM
Hi all, I have already searched on the forms and in general did not find an answer to my problem, I will be very grateful to you for help.
I need to create an output signal with a frequency of 100 Mhz as CLK in STM32H745. I used the Discovery Boards (STM32H745I-DISCO STM32H750B-DK) for the test.
1. I used timers with PWM and adjusted the ABM timer clock for 220 MHz, set up pre-scaler and counter period
But I achieve only 50 Mhz a clock as a maximum, with settings for 100 Mhz there is nothing at the output for CLK. To detect the clock I use PicOscope6404D (Bandwidth 500 Mhz).
2. I used as output ch A8 and adjusted A8 for RCC_MCO_1
I used the next settings but received the same result as for Timers not more than 50 MHz. Can you explain why I have this limitation (because the device settings show me that I can reach 100 Mhz but in real not )?
3. Finally I used the PA8 HRTIM_CHB2 timer and received high and very unstable frequency with very low amplitude. Do you how I can make a stable frequency and increase amplitude from HRTIM_CHB2?