2025-03-12 7:46 AM
Hi,
I'm using the NUCLEO-H743ZI2 board and I'm trying to interface it with an external DAC MCP4922 via SPI.
As explained in the documentation, the CS pin is very important because it is used to mark the end of a transmission for the DAC to put the received value on its output.
The problem with this CS validation pin is that I can't use a SPI circular DMA with multiple values as I first imagined to do because in this case, the Hadrware NSS Output Signal configurable in the .ioc doesn't work as I would like (between each data).
My actuel program is then working like this:
I use a timer that I configure to my aimed sampling rate. I use his PeriodElapsedCallback to send a SPI frame to my DAC.
Here are some snippets of what I've done:
// My timer callback
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
if (htim == &htim6) {
pwmDAC();
}
}
// Function to alternate the sample sent to the DAC to output a PWM
void pwmDAC() {
uint16_t sample = pwm_level ? 0xFFFF : 0x0000;
sendDAC(CHANNEL_A, sample);
pwm_level ^= 1;
}
// Generic function to send a value to my DAC
void sendDAC(mcp4922_channel_t channel, uint16_t sample){
uint8_t param = (channel << 7);
param |= (0x03 << 4);
uint16_t cmd = (param << 8) | ((sample >> 4) & 0x0FFF);
HAL_SPI_Transmit(&hspi2, (uint8_t*)&cmd, 1, HAL_MAX_DELAY);
}
// In the main() I just start my timer with
// HAL_TIM_Base_Start_IT(&htim6);
Figure 1 shows the SR limit I reach Figure 2 shows a typical SPI transmit with a 20Mhz speed
yellow: CS / purple: SCK / blue: MOSI / green: CHANNEL_A DAC output.
I made some research on the forum and found several discussions with similar issues. I've tried implementing some of them but I haven't been able to get them to work... As I'm still junior, I might be misunderstanding certain aspects and there are many things I still have to learn! I'de really appreciate any help!
Here are the discussions I've consulted:
https://community.st.com/t5/stm32-mcus-products/spi-too-slow/m-p/251638
Don't hesitate to ask me if you need more ressources!
Thanks in advance for your help!
jmF
PS: Maybe there is a DAC that can be controlled without this CS mecanic. It would allow me to use SPI DMA circular with a pingpong buffer and use HalfCplt and Cplt flag.
2025-03-12 10:06 AM
Master Inter Data Idleness can be used to have CS pulse high between words.