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DAlbe.3
Associate III
November 18, 2022
Solved

Bug in STM32L051 reference manual descriptions for some FLASH_PECR bits

  • November 18, 2022
  • 1 reply
  • 863 views

The descriptions of FLASH_PECR bits 1, 2 (PRGLOCK, OPTLOCK) on page 103 appear to have the meanings of 0 and 1 swapped. For example, referring to PRGLOCK (Bit1) the RM says:

0: The write and erase operations in the Flash program memory are disabled.

1: The write and erase operations in the Flash program memory are enabled.

see: https://www.st.com/resource/en/reference_manual/rm0377-ultralowpower-stm32l0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf

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Best answer by Imen.D

Hello @Community member​ ,

You are right, the sentences are swapped.

The correct sentence should be:

0: The write and erase operations in the Flash program memory are enabled/unlocked.

1: The write and erase operations in the Flash program memory are disabled/locked.

I raised this issue internally for correction in the ticket ID 139382 (PS: This is an internal tracking number and is not accessible or usable by customers).

When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.

Imen

1 reply

Imen.DBest answer
ST Technical Moderator
November 21, 2022

Hello @Community member​ ,

You are right, the sentences are swapped.

The correct sentence should be:

0: The write and erase operations in the Flash program memory are enabled/unlocked.

1: The write and erase operations in the Flash program memory are disabled/locked.

I raised this issue internally for correction in the ticket ID 139382 (PS: This is an internal tracking number and is not accessible or usable by customers).

When your question is answered, please close this topic by choosing Select as Best. This will help other users find that answer faster.

Imen

In order to give better visibility on the answered topics, please click on 'Best answer' on the reply which solved your issue or answered your question. Thanks