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I've been working on getting the STM32f7-EVAL operational to later on migrate it to STM32F767II. For this we decided to split up functionality into 3 sections, there is a forward facing application that has the main and specific business logic. Currently the main issue is that the CAN bus transmit (polling) is working flawlessly yet the receive (interrupt) seems to be non-functional. RF0R.FMP0 remains at 0x0, while FMPIE0 is set (1). it seems as if CAN_RF0R is disabled for some reason. Even though CAN_RX0_IRQn is enabled. /* CAN1 interrupt Init */ HAL_NVIC_SetPriority(CAN1_RX0_IRQn, 0, 0); HAL_NVIC_EnableIRQ(CAN1_RX0_IRQn);also the notification is enabled:HAL_CAN_ActivateNotification(&canDef, CAN_IT_RX_FIFO0_MSG_PENDING); after the NVIC and CAN are initialized.void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan)is the callback that i'm using.I also verified using messages coming into the MCU by scope and logic analyser. There is an additional device attached to the CA
Hello,I'm trying to set up an interrupt when my FDCAN controller received a CAN message. MCU is an STM32G0B1I went into STCubeMX and I enabled these interrupts:This generated some new functions instm32g0xx_it.c:void TIM16_FDCAN_IT0_IRQHandler(void){ /* USER CODE BEGIN TIM16_FDCAN_IT0_IRQn 0 */ /* USER CODE END TIM16_FDCAN_IT0_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan1); /* USER CODE BEGIN TIM16_FDCAN_IT0_IRQn 1 */ /* USER CODE END TIM16_FDCAN_IT0_IRQn 1 */} /** * @brief This function handles TIM17, FDCAN1_IT1 and FDCAN2_IT1 Interrupt. */void TIM17_FDCAN_IT1_IRQHandler(void){ /* USER CODE BEGIN TIM17_FDCAN_IT1_IRQn 0 */ /* USER CODE END TIM17_FDCAN_IT1_IRQn 0 */ HAL_FDCAN_IRQHandler(&hfdcan1); /* USER CODE BEGIN TIM17_FDCAN_IT1_IRQn 1 */ /* USER CODE END TIM17_FDCAN_IT1_IRQn 1 */}This appears to call this function for RX FIFO on 0 and 1 /* Rx FIFO 0 interrupts management ******************************************/ if (RxFifo0ITs != 0U) { /* Clear the Rx FIFO 0 flags */ __HAL_FD
I am currently developing a USB Mass Storage application using the STM32H563ZI with the following architecture:PC ← USB ← NUCLEO-H563ZI ← SD CardThe SD Card and USB Device have both been tested separately, and each works correctly on its own.However, after integrating the two, I would like to use USB MSC to expose the SD Card connected to the STM32H563ZI as a removable storage device on the PC. The PC is currently unable to recognize the SD Card properly.I would like to ask if there is any example code or reference project for the STM32H563ZI that demonstrates USB MSC with an SD Card.Thank.
Hi everyone,I'm working on a battery-powered flow meter application using the STM32L053, and I'm running into a massive, unexpected jump in power consumption.Previously, our device was successfully hitting the 0.0xx mA (around 30µA) range while maintaining our sleep cycle and keeping the LCD on. However, our boards are now consistently drawing between 5.3mA and 6.0mA, and I am struggling to isolate the leak.Application & Setup Details:MCU: STM32L053 (64-pin) Clocking: LSE is disabled. We are relying entirely on the MSI (262 kHz for run mode) and the LSI (~37 kHz) for the RTC and LCD. Peripherals Active in Sleep: LCD Controller: Driving a large custom 7-segment display (GTD2892B). Configured for 1/4 Duty, 1/3 Bias, running off the internal voltage source (VSEL = 0 or tied to 3.3V). LPTIM1: Running asynchronously in the background on the LSI to count flow pulses via an external op-amp (MCP6042). RTC: Set up with the WakeUp Timer to wake the MCU every 100ms to update the flow math a
Hello,I apologize for any obvious questions, but I am new to CAN and STM32 programming. I have written a code that successfully sends CAN messages to a CANalyzer for data interpretation, so I believe I have enabled the CAN portion correctly. My next objective is to send a message from a CANalyzer to the MCU and have it turn an LED on when it properly received the message. I am using an evaluation board (STM32H7B3I-EVAL).I attached a copy of my main.c file.What I would like to know is how to enable an RX interrupt handler so that I can receive CAN data.What do I have to add to the main.c to make that happen?
hi I’m using the board named NUCLEO-N657X0-Q and I want to use feature of FDCANbut I couldn’t find pin map for that where is the pin number for FDCAN? Thanks
Hello,I am using an STM32H7S3 with STM32CubeH7RS HAL [V1.2.1]. SPI5 drives a display over 3-wire SPI with 9-bit frames (the 9th bit carries D/C).With USE_FULL_ASSERT enabled, HAL_SPI_Init() triggers an assert in stm32h7rsxx_hal_spi.c (line 259 in the current GitHub version):if (IS_SPI_LIMITED_INSTANCE(hspi->Instance)){ assert_param(IS_SPI_LIMITED_DATASIZE(hspi->Init.DataSize)); assert_param(IS_SPI_LIMITED_FIFOTHRESHOLD(hspi->Init.FifoThreshold));}In stm32h7rsxx_hal_spi.h, the macro only accepts 8-bit and 16-bit:#define IS_SPI_LIMITED_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \ ((DATASIZE) == SPI_DATASIZE_8BIT))However:1. RM0477 [rev 10], section 55.3, Table 578 states that for SPI4 and SPI5 the data and CRC size is "configurable from 4 to 16 bits".2. The HAL itself is inconsistent. A few lines below the assert, the runtime check in HAL_SPI_Init() only rejects sizes above 16 bits for limited instances:if ((IS_SPI_LIM
Hi,I want to start a custom board design using STM32F405 but later I want to upgrade to STM32F407.Below are the features I want to target.Ethernet (IEEE802.3, TCP/IP< DHCP, MAC, SNTP) Can ethernet (10/100) over SPI interface (W5500) will work for STM32F405? USB OTG HOST UART x3 Analog 12-16 bit PWM input: at least 10KHz 8-bit Parallel interface for display.Is there any development platform available to cater all these features.Also, please suggest the programming tool as well for production.Let me know if you have any questions.Thanks, Mukesh
We are trying to bringup an omnivision camera on STM32N6. We are able to capture some data from the camera but unable get a good image but the image has lot of horizontal lines. I would like to some input on the configuration to make sure we are not missing anything on N6 side. uart:~$ ztest run-testcase test_pipeline:test_pipeline_validateRunning TESTSUITE test_pipeline===================================================================START - test_pipeline_validate ╔══════════════════════════════════════════════════════════════╗ ║ PIPELINE VALIDATION: OS05E10 -> CSI-2 -> DCMIPP -> PSRAM ║ ╚══════════════════════════════════════════════════════════════╝ Mode: 2592x1944 DCG 30fps Sensor: 2592x1944, HTS=714, PHY 1452 Mbps/lane ── STEP 1: Sensor I2C communication ── I2C read: ret=0read works here -> PASS ── STEP 2: Configure and start pipe0 ── video_set_format: ret=0 buffer enqueued: 10077696 bytes, ret=0[00:00:23.363,000] <inf> video_osxxxx: MIPI l
Hello STM32 Community,I am currently working on a VoIP project using the STM32H750B-DK and I am trying to integrate PJSIP/PJPROJECT into my STM32 application.My current setup is: MCU/Board: STM32H750B-DK Core: ARM Cortex-M7 RTOS: FreeRTOS Network stack: LwIP Ethernet PHY: LAN8742 IDE: STM32CubeIDE Compiler: ARM GCC VoIP: PJSIP / PJPROJECT Audio: WM8994 codec RTP: Already implemented and tested separately G.711: PCMU implementation is also being integrated Ethernet, LwIP, UDP and RTP communication are already working on my board. I can successfully exchange RTP packets and have been testing the network communication using Wireshark.My current goal is to integrate SIP + RTP using PJSIP, so that the STM32 can eventually register with a SIP server and establish VoIP calls.However, I am facing many compilation, configuration and integration errors while trying to port PJSIP to the STM32H750B-DK. I have tried configuring config_site.h, PJLIB, PJLIB-UTIL, PJSIP and the Fre
Hello,I am working on CAN-FD project and and I am able transmit and receive data. Currently it is continuously sending and receiving the data. But I want to send data only when receiver sends data requests. How can I do that? thanks for help
Hi, Am interfacing STM32H743 FDCAN classic with STM32F7 CAN. When I tried transmitting data from F7 to H7, within a minute H7 stop receiving data. I also tried debug the problem on F7 side and found that breakpoint hit on following condition inside the HAL_CAN_AddTxMessage() function in stm CAN driver: else { /* Update error code */ hcan->ErrorCode |= HAL_CAN_ERROR_PARAM; return HAL_ERROR; } }It means, all three mailboxes are filled that's why this condition getting true. I tried example from STM32H7 repository but same results.on the other hand, when H7 is configured as FDCAN only, in this case F7 is transmitting without any issue. Please help, am stuck with this problem from last 5-7 days. thanks in advance.
Hi,I'm struggling to get the CAN working on a project I'm working on with the STM32F446ZET6. With the project below (CastletRestart) i just get a flat line of 3.3V high on the TX line for CAN1, this is being tested in loop back mode, with the TUT_CAN_F446 project the can works (downloaded from a tutorial) in loopback mode, as far as i can see ive replicated everything across but it still isnt working.Its likely to be something silly and i do apologise for this being the case but i cannot see what ive missed having reviewed the code countless times.P.s. i am aware the Tutorial project is targeted at a different micro, but the CAN1 ports are the same.Any advice welcomed, thank you for your timeChris
Hello,I am attempting to communicate between my STM32H7B3I-EVAL and a Vector CANalyzer (VN1630A). I previously reached out to figure out why my CAN messages from the CANalyzer are not being received by the STM32 MCU. There was a belief that it was the filters causing the issue, so I did not initialize the filters and tried to see if any message was being received. There are still no messages being received, but I can send them from the STM32 to the CANalyzer without issue. I would like to find out why my code is not working, but I have some specific questions to try and assist my thought process:If the FDCAN_FilterTypeDef is a defined variable but not initialized, it will not filter, correct?Is the function correct for receiving data from the RXBUFFER?if(HAL_FDCAN_GetRxMessage(&hfdcan1, FDCAN_RX_BUFFER0, &RxHeader, RxData) != HAL_OK){ Error_Handler(); }Setup Picture: #include "main.h" /** @addtogroup STM32H7xx_HAL_Examples * @{ */ /** @addtogroup T
I am tried to send a simple message over CAN, but I got the broken Frame when transmitting, I capture it on a Logic Analyzer(Pic Below), it seems that it is Transmitting but not Correctly.Did I did somting wrong or Did I miss Someting?And here is my Code:int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR); NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); /* System interrupt init*/ /* SysTick_IRQn interrupt configuration */ NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0)); /** DISABLE: JTAG-DP Disabled and SW-DP Disabled */ LL_GPIO_AF_DisableRemap_SWJ(); /* USER CODE BEGIN Init */ /* USER CODE END In
This is a weird one :) I'm using the STM32F769 device, and I have the LTDC peripheral running at low speed (8MHz PCLK). When I send a CAN message to the unit, the CAN RX interrupt is invoked, and only when the ISR exits, an LTDC error interrupt is raised, which indicates FIFO underrun. Here is a code snippet below:void conv_u32_to_buf(uint32_t num, uint8_t buf[]){ memcpy(buf, (void*)&num, 4);}void CAN1_RX0_IRQHandler(void){ CAN_TypeDef* can = CAN1; // If CAN message available in the FIFO if ((can->RF0R & CAN_RF0R_FMP0) != 0U) { uint8_t data[8]; // Get pointer to mailbox CAN_FIFOMailBox_TypeDef* mailbox = &can->sFIFOMailBox[CAN_FILTER_FIFO0]; // This does not work uint32_t tmp = mailbox->RDLR; conv_u32_to_buf(tmp, &data[0]); tmp = mailbox->RDHR;
Here is the software setting:For STM32H735(STM32H745 is the same but with different ID):-Defines:/* USER CODE BEGIN PV */FDCAN_TxHeaderTypeDef TxHeader;FDCAN_RxHeaderTypeDef RxHeader;uint8_t TxData_Node1_To_Node2[] = {0x10, 0x32, 0x54, 0x76, 0x98, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66};uint8_t RxData_From_Node2[12];/* USER CODE END PV */ -FDCAN: hfdcan1.Instance = FDCAN1; hfdcan1.Init.FrameFormat = FDCAN_FRAME_FD_BRS; hfdcan1.Init.Mode = FDCAN_MODE_NORMAL; hfdcan1.Init.AutoRetransmission = ENABLE; hfdcan1.Init.TransmitPause = DISABLE; hfdcan1.Init.ProtocolException = DISABLE; hfdcan1.Init.NominalPrescaler = 1; hfdcan1.Init.NominalSyncJumpWidth = 13; hfdcan1.Init.NominalTimeSeg1 = 86; hfdcan1.Init.NominalTimeSeg2 = 13; hfdcan1.Init.DataPrescaler = 2; hfdcan1.Init.DataSyncJumpWidth = 12; hfdcan1.Init.DataTimeSeg1 = 12; hfdcan1.Init.DataTimeSeg2 = 12; hfdcan1.Init.MessageRAMOffset = 0; hfdcan1.Init.StdFiltersNbr = 1; hfdcan1.Init.ExtFiltersNbr = 0; hfdcan1.Init.RxFifo0ElmtsNbr = 1;
I would be interested in implementing a FDCAN communication between two STM32H747 MCU boards. I have implemented communication on a single board in External LoopBack mode. However, I am having problems understanding how to connect the two boards. Do any of you know how to do this, or do you know a good guide?
Is there a way to detect a CAN message loss in a RX Fifo when in the overwrite mode (so an overwrite?)
I’m trying to make the example LoRaWAN_End_Node_LBM] work on my nucleo-wl55jc1.For now i’ve just changed the DevEUI and AppKey in se-identity.h to match my chirpstack configuration.I can see the join request from my object and the join accept answer of the server but here is what i see on the log of the nucleo:LoRaWAN End Node LBMAPPLICATION_VERSION: V1.6.0MW_LORAWAN_VERSION: V1.1.0MW_RADIO_VERSION: V1.4.0L2_SPEC_VERSION: V1.0.4RP_SPEC_VERSION: V2-1.0.4Event received: RESET###### AppKEY: 2B:7E:15:16:28:AE:D2:A6:AB:F7:15:88:09:CF:4F:3C###### NwkKEY: 2B:7E:15:16:28:AE:D2:A6:AB:F7:15:88:09:CF:4F:3C###### DevEUI: CA:FE:BA:BE:DF:70:70:35###### AppEUI: 00:00:00:00:00:00:00:00###### DevAddr: DF:70:70:358s053:Add JOIN task8s053: TX MNG REQ time=00008053, final_time=000107888s055: Next TX on freq 868100000, DR 3 10s782: Payload: 00 00 00 00 00 00 00 00 00 35 70 70 DF BE BA FE CA 76 01 0A F0 D4 25 size: 23 995: TX DONE11s041: RX1 LoRa at 4957 ms freq:868100000, DR 3,
Hello,I have no CAN experience, but I have to decide soon if we can use the STM32 (prob. H7) with its CAN-FD interface.To me with my limited CAN knowledge it looks like it supports all hardware necessities, like "old & slow" CAN and the newer, faster version with bitrate change.But to make sure that I am not missing something important :What are the limitations of the STM32 CAN-FD ? What's your experience?Thanks in advance! Edit: I have checked / am reading AN5348 and the STM32 CAN-FD "presentation"
Hello,The latest version of STM32CubeWL (1.6.0), based on the Semtech LBM stack, does not support FUOTA.What is the recommended solution for a new project that requires FUOTA? Should we use an older version of STM32CubeWL (v1.1) that have FUOTA example code?Do you have an estimated date for when FUOTA will be available in the latest version of STM32CubeWL?Best regards,Mathias
Hi,We are currently facing serious supply shortage issues with the MX66LM1G45GXDI00 flash memory.As a potential solution, I am considering modifying the design to use an external Quad-SPI flash memory instead of the current Octo-SPI flash.My understanding is that this change may require us to develop or modify the following:Quad-SPI flash drivers for the STM32U5G9 Flash initialization and memory-mapped access configuration Programming/firmware download utilities Production programming support Bootloader and/or application changes, if required TouchGFX/external-memory configuration, if applicableCould you please let us know whether suitable Quad-SPI flash drivers, BSP components, or programming utilities are already available that we could leverage, particularly for the STM32U5G9?I would also appreciate your comments on the key challenges and any guidelines or recommendations you may have for this development effort. In particular, I would like to understand the potential impact on memo
Hello, There’s probably a solution, but I haven’t been able to fix it. Could you help me?In the circuits I’ve designed recently, the LSE crystal either doesn’t work at all or its operation is unstable. Generally, when debugging, it gets stuck at the SystemClock_Config(); section and won’t proceed.I’ve designed circuits using different MCUs and have encountered this problem across the board. In my latest circuit design (4-layer FR-4), I used an STM32WBA54CGU6 MCU and, for the crystal, the ABS07-LR-32.768KHZ-6-1-T recommended in the AN2867 Application Note. I’m using an 8pF C0G 0402 package capacitor as the load capacitor. I also tried a 6.8pF capacitor, but it didn’t work at all. The 8pF capacitor is also unstable. I tried driving it in different modes (LOW, MEDIUM, MEDIUMHIGH, etc.), but it remains unstable. I didn’t adhere perfectly to the layout rules, but I haven’t experienced problems in previous circuits where I followed them even less strictly. I’m trying to keep as few signals
Hi everyone,I am currently experiencing some issues with the FDCAN interface; my setup consists of two nucleo boards (Nucleo-G0B1RE) which use FDCAN interface to communicate with each other. As transceivers I am using two ATA6563-click boards.The clock used for FDCAN interface is PLLQ which ticks at 32MHz. The FDCAN parameters were configured using kvaser canfd timing calculator; Filters are disabled.I’ve generated two set of parameters:Nominal bitrate 500 kBit/s; Data bitrate: 2MBit/s Nominal bitrate 500 kBit/s; Data bitrate: 4MBit/s In both scenarios I’ve used a payload of 12 bytes and preserved the sending header:txh_n1.Identifier = 0x1ad; txh_n1.IdType = FDCAN_STANDARD_ID; txh_n1.TxFrameType = FDCAN_DATA_FRAME; txh_n1.DataLength = FDCAN_DLC_BYTES_12; txh_n1.ErrorStateIndicator = FDCAN_ESI_ACTIVE; txh_n1.BitRateSwitch = FDCAN_BRS_ON; txh_n1.FDFormat = FDCAN_FD_CAN; txh_n1.TxEventFifoControl = FDCAN_NO_TX_EVENTS; txh_n1.MessageMarker = 0x0;and the same while loop:bo
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