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Hi everyone,I'm using STM32 Cube Programmer CLI to port an SBSFU example to STM32U5G9 platform (from U585). Other than shell script mess and no IOC files in this examples, I've managed to port the example and run it by using ST Link programmer under both Linux and Windows.The problem is that the newest release 2.20 has its J-Link functionality completely broken in Linux (I'm using Kubuntu 22.04 and 24.04, also tested in regular Ubuntu). Any command to STM32_cube_programmer_CLI ends up with:Error: Could not connect to the J-Link/Flasher, Library not found !The underlying issue is that libjlinkarm.so is not linked to the CLI executable: ldd shows it's linked for older versions, but no linkage for v2.20. I'm guessing this has happened since ST was finally moving away from weird versioned so names to non-versioned so's: i.e. libjlinkarm.so.7 -> libjlinkarm.soI'm hoping that someone from ST will read this message since the issue is not possible to resolve without re-linking... So @s

Hi,I would like to ask whether support for the STM32C5 family is planned in the STM32 Motor Control SDK (MC-SDK).If so, could you please provide an indication of the expected release timeframe or roadmap for its integration?We are currently evaluating STM32 devices for a motor control application and would like to understand whether STM32C5 family will be officially supported by the MC-SDK in the near future.Thank you in advance for your support.Best Regards

Hi,we have a question regarding the Secure Manager Internal Trusted Storage size on the STM32H73 series.We have configured the following options:external flash profile 0 secure modules (=SMAK_0 ?)According to UM3254 it is our understanding the ITS size can now be up to 56 Kbyte:Our application project.py prebuild seems to extract value “9”, which means 9 * 8 Kbyte (Flash sector size) = 72 Kbyte? Jul  8 13:27:10 2026 : [INF] Searching the parameter with <Name>ITS size</Name> element2026-07-08 13:27:10,542 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] Parameter found. Verifying information of '<Value>0x9</Value>'2026-07-08 13:27:10,543 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] The modification is not necessary2026-07-08 13:27:10,543 - DEBUG - Wed Jul  8 13:27:10 2026 : [INF] The tag <Value> has already the correct content (0x9) Is there a misunderstanding on our end about the profile, memory configuration, UM3254 table, the prebuild proccess or the conversion

Hi everyone,I am new to the MCSDK environment and currently working on a porting project from MCSDK 5.4.8 to 6.4.1. I have been stuck on this for weeks and I am honestly getting desperate as I cannot find a way forward.I need a functional routine to handle encoder alignment that is compatible with the 6.4.1 framework. The alignment must be performed solely upon user request, and it is critical that the motor does not start running after the alignment sequence. I am looking for a direct replacement for the legacy MCAlignEncoderMotor1() API.I have already attempted the implementation suggested in this thread: MCSDK 6.3 - Correct way to restart / retrigger encoder alignmentUnfortunately, this solution does not work for my setup. Could you please provide guidance on how to trigger this alignment in isolation within the 6.4.1 architecture?Best regards,bolla_bo

Hello,I am working on a design incorporating the STM32U3C5CIU6Q in SMPS mode. This package includes two VDD11 pins. I am having trouble interpreting the datasheet when it comes to the number of inductors I will need. This note under Figure 24 in the datasheet is clear that each pin will need a capacitor to VSSSMPS, but it seems like it could also imply that each VDD11 pin requires its own inductor between VLXSMPS.The power supply scheme (with SMPS) is also not clear to me: This section seems more like it is expecting a single inductor:Am I okay to use a single inductor between the VLXSMPS pin and VD11 node, with each VD11 pin having its own capacitors, or should I treat each VD11 as a separate loop with its own inductor as well?Thanks for any help!

In RM0481 rev 4 April 2025 I find the following text:7.6.8 Write protectionA write-protected group of sectors cannot be erased nor programmed. As a result, a bankerase cannot be performed if one group of sectors is write-protected, unless a NVSTATEtransition to OPEN is triggered (erasing the whole user flash memory). It is not clear what NVSTATE is in this context. Is this a left-over from documentation of a different MCU? I don’t think it is PRODUCT_STATE. Because to my understanding you can have a PRODUCT_STATE > OPEN and not enable TrustZone and then write to FLASH_WRP1R_PRG to turn off write protection - you should be able to do a bank erase on bank 1. You can set initial values with an OB but I can’t see any documentation that this also makes changing FLASH_WRP1R_PRG illegal and the relevant OBs are not protected by PRODUCT_STATE the same way as e.g. SECWM and HDP.Same reasoning for flash bank 2.And if you enable TrustZone, it is stated that FLASH_WRP[1, 2]R_PRG is non-secure.

Hello ST Community,I am evaluating the security features of the STM32H733 (Cortex-M7) for a project that uses:A custom bootloader stored in internal flash The main application stored and executed from external QSPI/Octo-SPI flashI have the following questions regarding Secure Firmware Install (SFI):Is SFI for internal flash officially supported on the STM32H733? (I saw it was added in AN4992 Rev 8, but I would like official confirmation.) Is SFI for external flash (SFIx) supported on the STM32H733? Specifically, can the secure bootloader (RSS) decrypt and program the external application image securely during manufacturing, or is only the "host-side encryption + internal firmware configures OTFDEC" method available? If external SFIx is not supported, what is the recommended secure manufacturing flow for a design with main code in external flash?

Hi.I’m working on a custom board with a C551VET6 and trained on a NUCLEO_C562RE with ADC. I attempted the conversion in polling mode in several ways (mode=single + discountinuous=disabled  /  mode=continuous + discountinuous=3ranks) by varying the implementation of the FOR loop (including or excluding the calls to HAL_ADC_REG_StartConv and HAL_ADC_REG_PollForConv according to the selected mode); no matter what I did, as soon as I needed to convert 3 or more channels, only the first two showed distinct values, while all the other channels in the sequencer returned a value identical to that of the second channel.I found no example using more than 2 channels in a basic regular sequencer. Have you tried it at ST ?By the way, I’m working with a CTN temperature sensor and two HDC3120 giving both temperature and humidity, thus 5 channels in my case.Do I need to lower the resolution or something when the number of channel increases ?I’m not familiar with ST community mechanisms, shall I open a

Hi,I am trying to connect SDRAM AS4C16M16SB from Alliance Memmory to STM32N655X0 MCU, but i did not find any reccomended connection. I am “pinned” this memorry to MCU according STM32Cube MX software and MCU datasheet. But there is not much more information about “autoprecharge” function. Only in reference manual RM0486 is small note “The AutoPrecharge is not supported. However, FMC_A[10] must be connected to SDRAM A[0]”. But the memmory has dual function on the address 10 pin (address 10 + AP). Do you have some recommendation how this memmory connect to STM32N655X0 MCU, or is it suitable for this MCU?Below is my wiring diagram, in purple are FMC signals corresponding with pins on MCU. Is it right or am I must somehow reroute the address signal signal (A10)?Thanks a lot. R. 

Hi, Is there mistake between reference manual RM0486 and RM0090 in section SDRAM adress mapping?Where in RM0486 is: "When interfacing with a 16-bit memory, the FMC internally uses the ADDR[11:1] internal address lines to generate the external address. When interfacing with a 32-bit memory, the FMC internally usesADDR[12:2] lines to generate the external address. Whatever the memory width, FMC_A[0] has to beconnected to the SDRAM A[0].The AutoPrecharge is not supported. However, FMC_A[10] must be connected to SDRAM A[0]"In RM0090 is: "When interfacing with a 16-bit memory, the FMC internally uses the HADDR[11:1] internal AHB addresslines to generate the external address. When interfacing with a 32-bit memory, the FMC internally usesHADDR[12:2] lines to generate the external address. Whatever the memory width, FMC_A[0] has to beconnected to the external memory address A[0]. The AutoPrecharge is not supported. FMC_A[10] must be connected to the external memory address A[10] but it is alwa

1. Is it possible to install two versions of STM32CubeIDE (e.g., 1.9.0 and 1.19.0 or 1.19.0 and 2.2.0) on one PC (Windows)?   If so, can I run both versions simultaneously?    If so, can I program two microcontrollers simultaneously with two programmers?2.Is it possible to install STM32CubeIDE and STM32CubeIDE for VS Code on one PC (Windows)?   If so, can I run both versions simultaneously?    If so, can I program two microcontrollers simultaneously with two programmers? 

User should have ability to edit title of his topic. This is how good forums work.

A customer asked for the process technology or process node in nano meters (nm) for the STM32F303CCT7 we use. I can not find any information on ST website. The “Sidekick” told me there is no information about. Can someone help me?

Hi,I am using LSM6DSV320X for my project. Initially to save power I have Low G accelerometer with 15Hz ODR and 16G with fifo enabled. Once an activity is detected i want to switch on High G as well with 4000 Hz (with High Accuracy mode) and use both high G and Low G accelerometer for data collection. Is this possible if I dont use FSM or ASC and will High Accuracy then work ?. or can this only be achieved with FSM ? I look forward to your reply.

Hello,I am using the Nucleo STM32H533RE board for booting with the two stage boot path for which I am using the ST template code and referring the following   https://wiki.st.com/stm32mcu/wiki/Security:OEMiRoT_OEMuRoT_for_STM32H7S . I am able to run the provisioning script successfully but when I am connecting the serial terminal to verify the serial data sent out by the board, I am getting an error saying “[ERR] read:Wrong OBK HDPL2 cfg” as seen in below image:I tried with the following things:Regenerating the OEMuROT OBK files manually using stm32 trusted package creator Running the regression script to erase the flash and again running the provisioning script Verified if the key file names matches the script referencesCan someone help me with this issue.Let me know if any other details are required. Thanks,Amruta

Hello,I am working with an STM32N6570-DK board and facing an issue while setting up the SD card. I created a project using TouchGFX Designer, generated the code, and opened the .ioc file. In there, I enabled SDMMC2 with 4-bit Wide mode and enabled global interrupt:After checking the schematics, I noticed that the CK pin was incorrect, so I assigned the correct pin (PC2:(I made the following additional configurations:Changed all SDMMC2 pins to pull-up and set Max output speed to Very HighEnabled PWR_SD_EN (PQ7) as output level high with context FreeChanged clock from HCLK to IC4 (should not affect anything)Enabled SD_DETECT (PN12) to detect when the SD card is inserted or removedEnabled EXTI Line4 and EXTI Line12 for interruptsEnabled FileX with mostly default settings, except for increased memory and FX driver initialization:After this setup, I attempted to initialize the SD card with the following call:fx_media_open(&sdio_disk, "SDIO_DISK", fx_stm32_sd_driver, NULL, fx_sd_media_me

I'm trying to configure and generate a project with STM32CubeMX for the STM32WBA5MMGHx BLE module.When enabling the STM32_WPAN middleware, the ADV_TRACE module gets automatically enabled under Utilities. This in turn requires to enable at least one UART/LPUART peripheral, otherwise type UART_HandleTypeDef is undefined and compiler throws and error:../../Core/Inc/app_conf.h:304:8: error: unknown type name 'UART_HandleTypeDef'; did you mean 'RTC_HandleTypeDef'? [build] 304 | extern UART_HandleTypeDef huart1; [build] | ^~~~~~~~~~~~~~~~~~ [build] | RTC_HandleTypeDefThe STM32_WPAN throws a warning about not configured/wrong Platform Settings.Is there any possibility to configure STM32_WPAN without ADV_TRACE enabled?Used STM32CubeMX version is 6.17.0 and WBA firmware v1.19.0 and cmake project is generated.

Board: STEVAL-MKI109D (STM32H563ZI) + STEVAL-MKI207V1 adapter (ISM330DHCX)Goal: Bare-metal custom firmware reading WHO_AM_I over SPI1Following up on my earlier thread about GPIO pin mapping [link to old thread] — pin mapping is now resolved (SPI1_NSS on PA15, confirmed via community input; PA4/PA5 are DAC1 Vdd_set/VddIO_set as discussed). Thanks for the help getting there.I'm now stuck on a different issue and would appreciate a sanity check. WHO_AM_I consistently reads 0xFF, but every layer I can verify from firmware/multimeter checks out correctly:CS on PA15 (GPIO output, confirmed via MODER/ODR register dump) SPI1 Mode 3 (CPOL=1, CPHA=1) — confirmed via CFG2 register decode SCK/MISO/MOSI on PB3/PB4/PB5, AF5 — confirmed via GPIOB MODER/AFRL dump VDD/VDDIO measured 3.3V at the DIL24 breakout header (J13/J14 area on JP1/JP2), in spec HAL_SPI_TransmitReceive returns HAL_OK, ErrorCode=0x0, every call — no timeout, no fault Tested at both SPI_BAUDRATEPRESCALER_32 and _256 (extremes) — ide

I would like to confirm whether the Ethernet MAC available in the STM32N655x0H3Q supports 1000 Mbps (Gigabit Ethernet) operation.

Part is ~10-20 years old. Found some vague info that says there is an STM part# 35AX. Package is 14 pin, 14-VFLGA/LGA (3mm x 5mm). Pretty sure its an IMU/Accelerometer but trying to track down a pinout for a possible replacement.

Hi,I wish to buy this evaluation board:EVAL6470PD | Product - STMicroelectronics However, it's flagged as obsolete. Does this mean that POWERSO36 package of L6470 is not recommended for new design?Many thanks.WH

Hello, I am encountering an issue when connecting an ST‑Link with no target attached. On the first connection attempt it reports “No STM32 target found.” If I attempt to connect a second time, the adapter returns the error “ST‑LINK error (DEV_USB_COMM_ERR).” The only reliable recovery I have found is to unplug and replug the USB device:ST-LINK with DEV_USB_COMM_ERR issue When I use a different ST‑Link from the same batch (B 2022 48) with the same firmware, it behaves as expected and reports “No STM32 target found” until a target is present:ST-LINK without the issue Environment and reproduction steps:- Software: STM32CubeProgrammer CLI and GUI v2.23.0 (issue also reproducible with v2.22.0)- Commands (basically any -c): STM32_Programmer_CLI -c port=swd index=0 freq=4000 mode=ur -w "<Firmware path>" -v --start 0x8000000STM32_Programmer_CLI -c port=swd- OS: Windows 11- USB: Direct connection to PC- Cable: Same behavior with a Tag‑Connect or no target cable attached- ST‑Link firmware:

Hi ST community,We are evaluating motor-control architecture for a 3-phase BLDC/PMSM ESC project based on STM32G431 / STSPIN32G4.Currently we understand that STM32 MCSDK supports both:- FOC control projects- 6-step / trapezoidal control projectsHowever, we would like to clarify whether MCSDK officially supports runtime switch-over from 6-step control to FOC control in the same firmware project.Our target concept is:1. Start the motor with 6-step control or open-loop 6-step startup.2. After the motor reaches a sufficient speed / stable rotor position estimation, switch to FOC control.3. Continue running with FOC current loop and SVPWM.Questions:1. Does MCSDK officially support runtime switch-over from 6-step control to FOC control in one generated project?2. If not officially supported, is there any ST reference implementation, application note, or recommended method for implementing this handover?3. Can MCSDK-generated 6-step and FOC control modules coexist in one runtime while sharing