Solved

Hi everyone,I am working with the STM32C071 and experiencing problems with USB enumeration after my bootloader execution.I wrote a custom bootloader that performs checks (like CRC, metadata, etc.) and can also trigger the embedded STM32 DFU bootloader in System Memory using this method:void boot_jump_to_bootloader(void){ uint32_t i = 0; void (*SysMemBootJump)(void); uint32_t BootAddrC0 = 0x1FFF0000; __disable_irq(); SysTick->CTRL = 0; HAL_RCC_DeInit(); for (i = 0; i < 8; i++) { if (i < (sizeof(NVIC->ICER) / sizeof(NVIC->ICER[0]))) { NVIC->ICER[i] = 0xFFFFFFFF; NVIC->ICPR[i] = 0xFFFFFFFF; } } __enable_irq(); SysMemBootJump = (void (*)(void)) (*((uint32_t*) ((BootAddrC0 + 4)))); __set_MSP(*(uint32_t*) BootAddrC0); SysMemBootJump(); while (1) { /* Code should never reach this loop */ }}After performing my bootloader-specific instructions, I jump to the main firmware application using this f

Hi,after Update to v6.18.0 we get the following warning: Our configuration: Mouse hover: Obviously, you don't have a single source. Otherwise, it wouldn't be possible for the “240 MHz” label below the text field and for the “225 MHz” label to appear when hover over that same text field.Please, ST, conduct more integration tests! Attached our .ioc file.

Hi there, I found several issues in the STM32CubeMP2 CMSIS headers as follows:1. Missing opening parenthesis in bitmask macrosIn stm32mp21*xx.h, _Msk macro definitions were missing the opening parenthesis, leaving a dangling closing parenthesis with no matching open:// Before #define USB_OTG_GCCFG_FSVMINUS_Msk 0x1UL << USB_OTG_GCCFG_FSVMINUS_Pos) // After #define USB_OTG_GCCFG_FSVMINUS_Msk (0x1UL << USB_OTG_GCCFG_FSVMINUS_Pos)While the C preprocessor performs simple text substitution and the shift operation may still evaluate correctly at the call site depending on context, the unbalanced parentheses break static analyzers, automated code-generation tools, and linters that parse these headers. Adding the opening parenthesis also makes operator precedence explicit and unambiguous.2. Malformed comment delimitersAll of header files involves inline comments used *!< instead of the correct /*!< Doxygen-style comment opener, missing the l

Hello,We are experiencing an intermittent CAN-FD issue in our system and would appreciate any advice from the community. We have developed seven new I/O modules based on the STM32G491VETx with an external 20 MHz crystal.All have the same CAN configuration using ISO1042BDWVR. The CANopenNode stack with the CANopenNodeSTM32 driver is implemented on all electronic units.See https://github.com/CANopenNode/CanOpenSTM32  The CAN bus operates at 250 and 500 kbit. All electronic units occasionally experience the problem that the NodeGuarding or heartbeat (set to 3s!!!) stops responding after 24 hours to 5 days. SDOs do not respond either, whilst TPDOs continue to operate. We have set up over 10 networks, each with 4 different nodes (all G491), and all exhibit the same behaviour sporadically. We can rule out hardware faults.The electronic runs for about 48 hours with no Problem on 500k an low bus load (about 2%, Nodeguarding and some TPDO/RPDO).Suddenly FIXFDCAN RF0 FIFO FULL and RX NEW MESSAGE

I have copied this link from the post “STM32CubeIDE 2.2.0 released”:https://community.st.com/stm32cubeide%2Dmcus%2D28/stm32cubeide%2D2%2D2%2D0%2Dreleased%2D166532?postid=166532#post166532 But that link actually goes to:Text of the URL (with the https prefix removed, to stop the forum linkifying it):community.st.com/stm32-mcus-embedded-software-32/how-to-send-int-values-efficiently-through-cdc-usb-39682?postid=166532#post166532Which does, in fact have the same ?postid=166532#post166532 as the other link!

Hi,STM32H533 datasheet (DS14539 Rev 2) in table 88 says that RDY input setup and hold time are both 0.5ns. From my naive point of view it looks like superb value (RDY have to be stable only +-0.5ns around CLK edge). Isn't that a typo ? (STM32H7 PSSIs hold time is about 5.5ns)Thanks,Michal Dudka

Dear Team,I hope this email finds you well. I am writing to seek your expert clarification on a critical hardware design decision we are currently evaluating for our STM32MP257-based custom board.   --- Current Memory Configuration --- • SoC         : STM32MP257• Memory Part : Micron MT53E1G32D2FW-046 WT:C• Type        : LPDDR4• Density     : 32 Gbit (4 GB)• Organization: 1 x32 (Dual Channel — Channel A + Channel B) --- Our Understanding from ST Documentation --- Based on our research of the following official ST documents: 1. AN5723 (Rev 3, Aug 2024) :   "Interface width is 32-bit when full-populated, or 16-bit when half-populated." 2. AN5724 — DDR Routing Guide:   "For the 16-bit LPDDR4 interface, one 16-bit LPDDR4 is used in point-to-point connection. With this configuration it can drive up to 2 Gbyte memory." 3. AN5489 (Rev 6, Sep 2025) :   STM32MP257 supports both 16-bit (half-populated) and 32-bit (full-populated) LPDDR4 configurations. Our understanding is:• If using a native x1

 I have activated spread spectrum on two of the three PLLs I’m using in an STM32H7S7 via codeLL_PLL_SpreadSpectrumTypeDef sspr2;LL_PLL_SpreadSpectrumTypeDef sspr3;// in SystemClock_Config LL_RCC_PLL2_EnableSpreadSpectrum(); LL_RCC_PLL3_EnableSpreadSpectrum(); sspr2.DitheringRPDFN = 1; sspr2.DitheringTPDFN = 0; sspr2.IncrementStep = 1200; sspr2.ModulationPeriod = 10; sspr2.SpreadMode = LL_RCC_PLL_SPREAD_CENTER; LL_RCC_PLL2_ConfigSpreadSpectrum(&sspr2); sspr3.DitheringRPDFN = 0; sspr3.DitheringTPDFN = 0; sspr3.IncrementStep = 214; sspr3.ModulationPeriod = 60; sspr3.SpreadMode = LL_RCC_PLL_SPREAD_CENTER; LL_RCC_PLL3_ConfigSpreadSpectrum(&sspr3);Is there a way in CubeMX to activate it to make the settings generated automatically, as everything else I’m using?I’ve checked the RCC section in System Core as well as the Clock Configuration tab, but I can’t see anything regarding spread spectrum

Hello,I am designing an NFC reader based on the ST25R300, using the STEVAL-D25R300A schematic as a reference for the antenna matching network. My board uses the same component values on each side of the differential output:L1/L2 = 120 nH (EMC filter series)C11/C8 = 390 pF (EMC filter shunt)C1/C12 = 82 pF each, in parallel (series matching)C14 = 120 pF (shunt)C67 = 39 pF (shunt)C59 = 10 pF, C16 = 150 pF (RFI divider)R3/R4 = 2.2 ohmI could not find the antenna coil parameters in the user manual or the design files. Could you please provide the following for the antenna used on STEVAL-D25R300A?1. Coil inductance at 13.56 MHz2. Coil AC resistance (or Q) at 13.56 MHz3. Whether the antenna is a PCB trace coil or a discrete component, and if it is a PCB trace, the outer dimensions and number of turns4. The target differential impedance the matching network above was designed for Thank you.

Dear ST Support Team,We are currently developing a board based on the ST25DV04K and would appreciate your guidance regarding the antenna interface.In our schematic, we have placed a π coupling filter (series inductors and shunt capacitors) between the AC0/AC1 pins and the antenna matching circuit, upstream of the latter, for coupling at 13.56 MHz, as shown in the attached schematic.Could you please clarify whether the use of this π coupling filter, positioned before the matching circuit, is recommended by ST, or whether it is not necessary in this configuration?Thank you in advance for your support — we look forward to your recommendations.Best regards, 

I’ve designed a flyback w/ Viper27HD.  Turn on voltage is 120Vdc.  Max design input volutage is 500Vdc.  Output voltage is 12V.  I designed the VCC tertiary winding for 16V, but due to spike rectification the actual votlage is 20.2V for Viper VCC.  The prime supply is a MagnaPower SLx-1.5-500-3-xxxxx power supply with voltage, current, power, control and + and - slew rate control. The Viper “wakes up” when the input voltage is at ~110V.  I have an internal POR circuit that holds off my controls until 250 ms later.  When the POR ends, the 12V housekeeping power is used to energize the gate drive of a FET from the input power rail to a large capacitor bank through a 40 Ohm “Soft Start” resistor.  When the gate drive initiates, the Viper chip shuts down for 22 ms which temporarily glitches the housekeeping power.  I’m using a FOD2711 isolation regultor for FB control. I observe: VCC of Viper is STABLE through the shutdown. VBR never approaches the brown out threshold FB switches hard to G

Hi all, I merged the VENC_JPEG_Encoding example with a DCMIPP app. Both parts work on their own, but the JPEG encoding breaks (error -9 = JPEGENC_HW_BUS_ERROR) as soon as I turn on the DCMIPP capture. The JPEG input/output buffer is completely unrelated to the DCMIPP buffer. It’s just that as soon as I start the DCMIPP in CONTINUOUS mode, the JPEG encoder breaks… Very strange.Did anyone else experience this problem? What could cause this? How would I fix this? Best regards, rphii

Hello CommunityThis is my first post here, and I have started learning about the STM32G4xx processors. So I might very well have got something wrong here. I like to ask about a detail in the pin-out picture of the STM32G431 Nucleo64 board in STM32CubeMX software. When I look at the schematics for this Nucleo board, it seems that the PA5 pin can activate the LD2 LED and not the LD1. I guess, that for the typical beginner start blink software, you normally use LD2. When I look at the same picture for the NUCLEO64 STM32G474 board, this PA5 pin activate LD2.The same pin is used for input to an OP-AMP. Would it be possible to use it if you disconnect the SB6 jumper?

Hello:Observation (empirical, multiple boundaries confirmed):When placing DMA linked list nodes (36 bytes each = 9 words) sequentially in SRAM1,if a single node spans certain addresses, the GPDMA channel enters DTEF statewhen fetching that node. Confirmed problematic boundaries in SRAM1 (192KB, 0x20000000 - 0x2002FFFF):- 0x20010000 : crossing FAILS- 0x20020000 : crossing FAILS Both boundaries appear at 64KB intervals within SRAM1, which suggeststhat SRAM1 may be internally organized as multiple 64KB blocks/banks. Test cases:Test 1: Node array starting at 0x20011A54 (natural placement)- Nodes 1-1633: within bank containing 0x20010000-0x2001FFFF → OK- Node 1634: spans 0x2001FFF8 - 0x2002001C → FAILS (crosses 0x20020000) Test 2: Node array starting at (0x20010000 - 44)- The first node spans 0x2000FFD4 - 0x2000FFF8 (OK)- The second node spans 0x2000FFF8 - 0x2001001C → FAILS (crosses 0x20010000) Test 3: Node array starting at (0x20010000 - 36)- The first node ends exactly at 0x20010000- No

Thank you for your replies. Good for me to know, that this marking should have been LD2. I wondered that, I may had got something else wrong about this. It seems to me, that CubeMX assumes, that the SB6 jumper is installed, so you cannot use CubeMX to set the PA5 as input for OPAMP2. But I guess, that you can use some HAL function to do it. Am I right?   CubeMx doesn’t care if SB6 is soldered or not. So remove SB6 and configure PA5 for OPAMP function either in CubeMx or using directly the HAL. When I look the PIN-out view, PA5 is marked red. When I look the reference manual about OPAMPS:Then it seems possible to have OPAM2 use PA5. In CubeMX I look at OPMP2 mode pull down menu, you got “Standalone Internally connected_IO”. But it is marked red and cannot be selected.Post split from this thread for a newer question.

Hi, I’m looking into the WL55JC1 for a project which would require the system to remain dormant (ideally standby) for weeks, maybe months and then resume operation on a set date at a set time. I would like to use LSI as power and space will be very limited.So far I’ve discovered, that of course there is an RTC and it has alarms that can be used to wake from standby mode. However all examples and documentation I can find only ever use times or maybe day-of-week or day-of-month as the set wake up time. Never a full date and time. Looking at the code, stm32wlxx_hal_rtc.h defines a struct RTC_AlarmTypeDef with fields for seconds, minutes, hours and either a day-of-month, or day-of-week.Is it really not possible to give the system a full a date and time yyyy-mm-dd and hh-mm to wake up at? Will I need to build workaround waking up at least once a month to recalculate the next wake-up until the actual target time is within the same calendar month?Or am I overlooking something?I’d appreciate a

Hello everyone, I can run my model through the stedgeai / STM32Cube AI Studio and see the following: But when I now go into the resulting application and build it myself, I see these memory sections, which tell a totally different story: How can I fix this? I added the AXISRAMx sections (they are not provided per default) which results in them being used by 0%, so that also can’t be right. Best regards, rphii

why while creating new project in stm32cubemx, it  show like this error downloading the following files crdb.zip?download has failed ,some data may not be updated,please retry later. how to solve it?

custom board, The USB D+ and D− lines are connected directly from the MCU to the USB Type-B connector, with no intermediate components. There is no pull-up resistor on the D+ line, as I understand that the MCU provides the pull-up internallyAs far as I know, the stm32u595 supports USB High-Speed using its internal PHY.CubeMX Version: 6.18.0Reference project:https://github.com/STMicroelectronics/STM32CubeU5/tree/main/Projects/STM32U5G9J-DK2/Applications/USBX/Ux_Device_CDC_ACMI configured my .ioc file to match the reference project as closely as possible. UART is not used.Issue:I implemented a simple CDC ACM echo function to verify USB communication.In Full-Speed (FS) mode, the echo function works correctly. The PC recognizes the device, and both transmit and receive operate normally. In High-Speed (HS) mode, however, the PC does not recognize the USB device at all (it reports an unknown or unrecognized USB device), so communication cannot be established.What could I be missing, or what

Hi all, i am just trying to figure out how to connect the Stwinbox board with Rs485. if you have any advice in terms of applications i must use and the recommended firmware?  regards

I'm trying to disconnect a ethernet cable after flashing a code Then I'm getting [00:01:50.522,000] <err> net_tcp: net_send_data()[00:01:52.200,000] <wrn> net_if: iface 1 is down[00:01:52.200,000] <err> net_tcp: net_send_data()[00:01:52.480,000] <wrn> net_if: iface 1 is down[00:01:52.480,000] <err> net_tcp: net_send_data()[00:01:52.900,000] <wrn> net_if: iface 1 is down[00:01:52.900,000] <err> net_tcp: net_send_data()[00:01:53.530,000] <wrn> net_if: iface 1 is down[00:01:53.530,000] <err> net_tcp: net_send_data()[00:01:54.475,000] <wrn> net_if: iface 1 is downThis is expected since trying to connect it backWhen I reconnect ethernet cable Im getting an below error [00:01:54.475,000] <wrn> net_if: iface 1 is down[00:01:54.475,000] <err> net_tcp: net_send_data()[00:01:55.282,000] <inf> phy_mii: PHY (0) Link speed 100 Mb, full duplex[00:01:56.212,000] <err> os: ***** USAGE FAULT *****[00

Dear team, hello, I've drawn a power supply circuit diagram for the STM32F051R8T6 but I'm a little hesitant. The diagram of my circuit is below. Have I done it correctly? Thank you for your answer. 

Hello, I have an STM32H573 project with TrustZone enabled. After the CPU goes into non-secure mode and during execution of the HAL_Init() function (more specifics below) a hard fault occurs. There is only a hard fault during the execution from a non-secure state. In the secure state (at boot) the HAL_Init() function successfully runs. Is there a configuration for the RCC not enabled by default that I a missing, allowing it to be accessed by both Secure and Non-Secure CPU states?Within GTZC_S TZSC - Privilegeable peripherals I cannot enable it. I see no relevant settings (I have tested a few that might be loosely related but no solved) in RCC. In the code below I have used an arrow (<--) to denote exactly where the hard fault occurs (Verified with debugger)Non-Secure Entry Code (CubeMX Generated):int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* MPU Configuration-------------------------

Hello, I may be missing something, I cant generate the SPI_init() method within main() (also pins are yellow ?)…I have generated;  HAL_Init(); /* Configure the system clock */ SystemClock_Config(); /* Initialize all configured peripherals */ MX_GPIO_Init(); Cheers

Hello,I have completed this guide successfully:How to integrate TouchGFX and camera middleware on an STM32N6570-DK However, I am running into an issue when I try to add SDMMC2 or ETH in the .ioc.  After I generate code then build in the IDE, I get the below error: C://TouchGFXProjects/VisionControlboard2/FSBL/Core/Src/main.c:334:(.text.startup.main+0x12c): undefined reference to `HAL_SD_Init'C:/ST/STM32CubeIDE_2.0.0/STM32CubeIDE/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.14.3.rel1.win32_1.0.100.202602081740/tools/bin/../lib/gcc/arm-none-eabi/14.3.1/../../../../arm-none-eabi/bin/ld.exe: (HAL_SD_Init): Unknown destination type (ARM/Thumb) in ./Application/User/Core/main.oC://TouchGFXProjects/VisionControlboard2/FSBL/Core/Src/main.c:334:(.text.startup.main+0x12c): dangerous relocation: unsupported relocationProject in link below:https://app.box.com/s/bdbyzi5eqvqhgib90klxgehmhs8pkynsWhat is the best method to get this resolved?  I am using STM32CubeIDE Version 2.1.1