STM32H573 TZ-EN - RCC Access When CPU NS Causing Hardfault
Hello,
I have an STM32H573 project with TrustZone enabled. After the CPU goes into non-secure mode and during execution of the HAL_Init() function (more specifics below) a hard fault occurs. There is only a hard fault during the execution from a non-secure state. In the secure state (at boot) the HAL_Init() function successfully runs.
Is there a configuration for the RCC not enabled by default that I a missing, allowing it to be accessed by both Secure and Non-Secure CPU states?
Within GTZC_S TZSC - Privilegeable peripherals I cannot enable it. I see no relevant settings (I have tested a few that might be loosely related but no solved) in RCC.
In the code below I have used an arrow (<--) to denote exactly where the hard fault occurs (Verified with debugger)
Non-Secure Entry Code (CubeMX Generated):
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* MPU Configuration--------------------------------------------------------*/
MPU_Config();
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init(); <-- Hard fault within this function
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* GTZC initialisation */
MX_GTZC_NS_Init();
...HAL_Init Code (CubeMX Generated):
HAL_StatusTypeDef HAL_Init(void)
{
/* Configure Flash prefetch */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos]; <-- Hard fault here (Specifically inside the HAL_RCC_GetSysClockFreq() function)
/* Select HCLK as SysTick clock source */
HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
{
return HAL_ERROR;
}
/* Init the low level hardware */
HAL_MspInit();
/* Return function status */
return HAL_OK;
}HAL_RCC_GetSysClockFreq Code (CubeMX Generated):
uint32_t HAL_RCC_GetSysClockFreq(void)
{
uint32_t pllsource;
uint32_t pllp;
uint32_t pllm;
uint32_t pllfracen;
uint32_t sysclockfreq;
uint32_t hsivalue;
float_t fracn1;
float_t pllvco;
if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_CSI) <-- Hardfault occurs here
{
/* CSI used as system clock source */
sysclockfreq = CSI_VALUE;
}
else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
{
/* HSI used as system clock source */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIVF) != 0U)
{
sysclockfreq = (uint32_t)(HSI_VALUE >> (__HAL_RCC_GET_HSI_DIVIDER() >> RCC_CR_HSIDIV_Pos));
}
else
{
sysclockfreq = (uint32_t) HSI_VALUE;
}
}and even more specifically this is the last instruction in that function before execution jumps to the hardfault
ldr r3, [pc, #556]
