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1.  ADC setting hadc.Instance = ADC1;  hadc.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;  hadc.Init.Resolution = ADC_RESOLUTION_12B;  hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT;  hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD;  hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV;  hadc.Init.LowPowerAutoWait = DISABLE;  hadc.Init.LowPowerAutoPowerOff = DISABLE;  hadc.Init.ContinuousConvMode = ENABLE;  hadc.Init.DiscontinuousConvMode = DISABLE;  hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START;  hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;  hadc.Init.DMAContinuousRequests = ENABLE;  hadc.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;  if (HAL_ADC_Init(&hadc) != HAL_OK)  {    Error_Handler();  }​  /** Configure for the selected ADC regular channel to be converted.  */  sConfig.Channel = ADC_CHANNEL_4;  sConfig.Rank = ADC_RANK_CHANNEL_NUMBER;  sConfig.Sam

What's the process to add a native gcc to openstlinux-weston so I can compile from the command line on my DK2 dev board? I was able to rebuild using bitbake and started poking around to find which layer to enable to get a native gcc running on the STM32MP1 dev board (DK2) but I can't figure it out. Or should I use a different approach, is there a pre-built image for the DK2 with native gcc?Thanks,Andrew

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My Ethernet driver is not wrapping as I expect.Section "61.10.1 Descriptor Overview" in RM0399 states that descriptors up to N-1 is owned by the DMA and the DMA continues to process descriptors until the Current Descriptor Pointer == Tail Pointer.In order to exit suspend state, the tail pointer must be updated so that the Current Descriptor Pointer < Tail Pointer.Using the example in Figure 841, the tail pointer points to entry 10 (which is not a valid entry since only 0 to 9 are valid). I can see that the DMA runs until the current descriptor points to 10, but it does not wrap back to zero. If the tail pointer must be larger than the current pointer, what should it be? Should it point to entry 11??When will the DMA wrap, and start operating on buffer 0 again?

Hi!There is such a document: "AN5464-Position control of a three-phase permanent magnet motor using X‑CUBE‑MCSDK or X‑CUBE‑MCSDK-FULL"It describes the method of setting the PID controller. It is necessary to reset all coefficients and gradually increasing the P-component to achieve its fluctuations. Question: before that, do you need to set the motor to the zero position or another angle? or how did the CUBE generate and compile?Thank you in advance for your help!P.S.It is not possible to configure the PID controller. The best thing that happened is shaking in the set positions and the engine is very warm!

himy question is simple: what does record:/end: mean in a code?

HI,I set up STM32CubeMX to declare SystemClock_Config as static.However, SystemClock_Config is not declared static.The versions in question were STM32CubeMX 6.3 & STM32Cube FW_F4 V1.26.1.I also tried the latest version of STM32CubeMX 6.5 & STM32Cube FW_F4 V1.27.0, but it didn't solve the problem.Is there any documentation on this issue?

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When power is applied to the STM32L476, 3.3 v is also applied to the LSM303AH pins2             CS9             Vdd 10           Vdd IOThese commands work:MX_I2C3_Init();                      Goes to code created by CubeMX HAL_I2C_GetState(&hi2c3);  it is readyHAL_I2C_Init(&hi2c3);I get timeout error (32) with the following commands. What did I do wrong?HAL_I2C_Mem_Reads          All time outHAL_I2C_Mem_Writes         All time outHAL_I2C_Master_Receives     All time outHAL_I2C_Master_Transmits    All time outExamples:HAL_I2C_Mem_Read(&hi2c3,0

Hi everyone,I am using the NUCLEO-G474RE development board with STM32G474RE MCU​The ioc file is attached, and this is main function:int main(void) { /* USER CODE BEGIN 1 */   /* USER CODE END 1 */   /* MCU Configuration--------------------------------------------------------*/   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SYSCFG); LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);   /* System interrupt init*/ NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);   /* SysTick_IRQn interrupt configuration */ NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),15, 0));   /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral */ LL_PWR_DisableUCPDDeadBattery();   /* USER CODE BEGIN Init */   /* USER CODE END Init */   /* Configure the system clock */ SystemClock_Config();   /* USER CODE BEGIN SysInit */ &

I'm doing some signal integrity verifications using the STM32H7 IBIS models to determine if I need terminations for connecting my STM32H7 to a HyperRAM memory.I was a bit surprised with the poor signal integrity I was getting, which I assumed was due to faster edges than expected. I looked a bit deeper in my simulations and noticed that the rise time for the IO was only 160 ps. This is an extremely fast number and I was expecting it to be closer to 1 ns.The IO is running at 1.8 V with HSLV enabled and the fastest IO speed. The MCU has the UFBGA176+25 package.Is this 160 ps number realistic?

I took the stm32Cube example : Projects\STM32L562E-DK\Examples\OCTOSPI\OSPI_NOR_ReadWrite_DMA and modified it to send a RDID (9Fh) instruction to the NOR. I get a "0xAC 0x28 0x53" but I ignore which codes that NOR flash is supposed to answer. It could be valid, though.Then, I send a RDSDFP instruction (5Ah) and then I receive a sequence of "0x00" which is wrong because the NOR flash is supposed to send 0x50444653. Could someone share the code functions using a simple OSPI_RegularCmdTypeDef to read the NOR-flash ID and the NOR-flash SDFP So that I can verify on my disco kit that the NOR-flash is alive.Thanks

You can found below a extract of my linker script:MEMORY { D1_CODE_RAM (xrx) : ORIGIN = 0x24070000, LENGTH = 64K FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K NVRAM (rx) : ORIGIN = 0x8020000, LENGTH = 64K }   .ram_code_load () : { . = ALIGN(4); _sdata = .; /* create a global symbol at data start */ *(.ram_code_load) *(.ram_code_load*) *RestApiServer.o (.text .text*) *Cryptographic_CM7.a:*(.text .text*) KEEP(*(.ram_code_load)) . = ALIGN(4); _edata = .; /* define a global symbol at data end */ } >D1_CODE_RAM AT> NVRAMWhat I expect is to found into my .map file the Cryptographic_CM7 .text code placed at 0x8020000 as it's done with RestApiServer.o code.What I get is the Cryptographic_CM7 library .text code placed at 0x8000000...Until now I had follow this PDF as ressources whitout any sucess. https://www.st.com/resource/en/application_note/an4296-use-stm32f3stm32g4-ccm-sram-with-iar-embedded-workbench-keil-mdkarm-stmicroelectronics-stm32cubeide-and-other-gnubased-

Hi!Help!When creating a position control project in the MC SDK using NUCLEO-F446RE and X-NUCLEO-IHM08M1-3Sh when compiling to KEIL, an error occurred.It is not clear where the value of SPEED_LOOP_FREQUENCY_HZ is defined.Thank you in advance!

Hi St forum   I'm in the progress of creating a peripheral BLE application using the STM32WB55CE on a custom board.   I'm trying to implement low power now, but struggling..   Using the X-Nucleo-LPM01A power monitor board I've measured my current consumption (no low power implemented): This is not impressive, but expected.   To get a grip on ST low power, I've run various examples on the P-Nucleo.WB55 dev. board, but it looks like the current consumption is very high no matter the example??? I've based my guesses on the Power features application note.   Setup: All jumpers from STLINK is removed during test.   PWR_STOP2_RTC exampple: expected ~2.2uA   PWR_EnterStandbyMode: expected < 1uA.   PWR_SMPS_16MHZ_HSI w/o RF Stack: ??   PWR_SMPS_16MHZ_HSI with RF Stack:   BLE_HeartRate: not sure.   So the question is: I'm I missing something vital? Ideally I would like the application to enter either STOP2 or STANDBY when no BLE central

Hi,My bellow question is based on info read from:https://wiki.st.com/stm32mpu/wiki/STM32MP15_ROM_code_overview#Configurationandhttps://wiki.st.com/stm32mpu/wiki/STM32MP15_backup_registers#Boot_mode_selection_featureFrom those two links I understand that if ROM CODE sees "0xFF" in the BOOT_MODE register then it will not continue to TF-A and instead enter flashing mode.The bellow is also mentioned:"The Linux kernel can force a reboot mode by writing to the BOOT_MODE register.This writing is done via the "reboot" Linux command,which is configured via the compatible "syscon-reboot-mode" in the device tree."What I want to achieve / understand if possible is to run a Linux userspace command to write 0xFF into BOOT_MODE and reboot the system.I can't find a way to do this...Also, just to make sure, If I am able to achieve the above, will the device boot into DFU mode ?some background:Playing with boot selection pins on the evaluation boards is easy, not so much on our production boards.In addi

I am developing a application with STM32F746G discovery board with my sensor, and I reference AN4749 to design a lop-power control flow.But I don't know how to measure/monitor/analyzing the power consumption to make sure whether my design is work or not.Is there any software tool that can do this? Or I need to buy another hardware tool?Thanks for any kind support.

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I cannot find the script generate_OoB_hexfiles.bat refereed at the STM32F7508-DK demonstration library. On the other hand, This script is only used for concatenate hex images to an only one hex image, and I want to know more about this process. Please, could somebody help me with this topic by providing literature about that?Thanks in advance.

Usually I find this information in the pin mapping description, e.g. for the device STM32L4A6AG I would have assumed to find it in section 4 "Pinouts and pin description", where all other stuff like SPI, I2C, FMC, EVENTOUT, TIM etc. are described.LinkToDataSheetIs there no pin interrupt enabled on that chip? Of course there are, but which one? What did I miss?

Hi,I'm using the STWIN SensorTile Wireless Industrial Node development board which has a micro Ultra-low-power ARM Cortex-M4 MCU at 120 MHz with FPU, 2048 kbytes Flash memory (STM32L4R9).I need to interface with a device that uses CANopen, is it possible to implement this protocol on this micro with opensource libraries?I have seen that there are st partners who can implement this but I have to pay them.thank you very much for your availability.

In STM\STM32Cube_FW_WL_V1.2.0\Projects\NUCLEO-WL55JC\Applications\LoRaWAN\LoRaWAN_End_Node\LoRaWAN I cannot find an explanation for the NUCLEO-WL55C1 LEDS GREEN, BLUE, RED meanings. In lora_app.c I found: AppLedStateOn = appData->Buffer[0] & 0x01; that toggles the RED LED There is nothing in the DOCS, README, PDF files and the source is not commented to the programmers intentions, must be real obvious but I'm missing it.

I'm trying to use the MEMS1 microphone streaming example, with 4 pdm microphone and a stm32wb55. I am able to use it to get a 48kHz 16 bits per sample with all the microphones without any issue.But when I try to use 24 bits per sample (I'm not sure this is how im supposed to set 24 bits depth but didn't find any other part related to resolution in the code) :The audio acquisition I get on Audacity is wrong :The first two channels are full of sound, third channel is deaf and 4th channel works fine.I have tried with 32 Bits Per Sample and there were no issues. Any idea of what's wrong ? I didn't edited the code. I did the same test but using only two microphones, and the result was the same : first channel full of sound, and 2nd is working.Thanks

Hello everyone.There is a possibility of use STMicroelectronics nodes at native NODE-RED, and use Node-RED instead STM32CubeMonitor?