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['F446 documentation] RCC - frequency limit of dedicated SPDIF-Rx output from PLLI2S

Posted on January 16, 2018 at 21:11

0690X00000609KLQAY.png

However, SPDIF-Rx needs at least 135.2 MHz  to support 192kHz audio sampling rate.

Can ST please comment?

Thanks,

Jan Waclawek

1 ACCEPTED SOLUTION

Accepted Solutions

Hi Imen,

Thanks for the clarification.

This then should be corrected in both the datasheet (3.27 SPDIF-RX Receiver Interface (SPDIFRX)) and RM0390 rev.4 (27.2 SPDIFRX main features and Table 168. Minimum SPDIFRX_CLK frequency versus audio sampling rate, ).

Jan

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4 REPLIES 4
Imen.D
ST Employee

Hello,

We proposed to add a note in the coming release of reference manuals in Section "Clocking strategy" after table "Minimum SPDIFRX_CLK frequency versus audio sampling rate" like this:

“Please check the RCC capabilities in order to verify which sampling rates can be supported.�?

Kind Regards,

Imen.

When your question is answered, please close this topic by clicking "Accept as Solution".
Thanks
Imen

@Imen DAHMEN​  ,

Thanks for the reply.

So, does this mean that the STM32F446 does *not* support 192kHz audio sampling rate on SPDIF-Rx?

JW

Imen.D
ST Employee

@Community member​ ,

Yes, I confirm we can't support 192KHz.

Regards,

Imen.

When your question is answered, please close this topic by clicking "Accept as Solution".
Thanks
Imen

Hi Imen,

Thanks for the clarification.

This then should be corrected in both the datasheet (3.27 SPDIF-RX Receiver Interface (SPDIFRX)) and RM0390 rev.4 (27.2 SPDIFRX main features and Table 168. Minimum SPDIFRX_CLK frequency versus audio sampling rate, ).

Jan