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ADC measurement noise on STM32G0 based MCUs

Associate III

I'm using the STM32G071C8U7 microcontroller for AC-DC converter, and despite calibrating the ADC and obtaining mostly accurate measurements for all sampled channels, there is an inherent noise problem. When shorting one ADC channel to ground, I can't achieve a 0 count reading. Instead, the ADC measured value varies by 3 counts, occasionally spiking even higher. This issue persists across multiple boards (non-dev boards), causing concern as the signal is vital for closed-loop control.

In the initial implementation, the ADC runs at a 12 MHz clock frequency, triggered every 15 us. 5 channels are sampled using a sequencer with a sample duration of 3.5 ADC clocks, totaling 6 PCLK. In this MCU, the VREF+ pin is external and I have it connected directly to the VDD/VDDA pin. I am aware of 3 major noise-contributing factors in ADC measurements: power supply, reference voltage, and external measurement circuitry. To address the external circuitry issue, I used a free pin with no external connections, shorting it directly to ground. However, the measurements never really reads 0, instead it oscillates by 3 counts.

Finally, I conducted another test to assess potential issues with the noisy VREF+ by disconnecting it from VDD/VDDA. I used an internal voltage reference of 2.048 (VREFBUF) with a 100 nF external 0603 X7R cap. Unfortunately, this did not resolve the issue, as the same random noise persisted, fluctuating by 3 LSB at least. And yes I did implement the wait function which ensures that VREFBUF is enabled correctly. 

Now, I'm considering whether the LDO voltage of 3.3V, powering all analog/digital circuitry, might be the problem. However, the LP2985-33DBVRM3 LDO which is from TI has excellent characteristics and isn't working at full capacity. Options to address this noise-related problem seem limited now. I suspect that the merging of analog VDDA/VSSA and digital VDD/VSS power supply pins in the STM32G0-based MCUs could be contributing to this issue. In contrast, using STM32F051K4U6 MCUs previously didn't result in such significant random noise across all analog pins.

 I wonder if there is anything that could be done to suppress this noise further (apart from filtering it in software) or should I look for a different MCU that has dedicated analog power supply pins instead? There are several more things I could try. I could try increasing supply voltage from 3.3V to 3.6V, but I am afraid that noise will scale with higher supply voltage as well. Another solution perhaps would be to go with STM32G4 series, but that is relatively more expensive MCU. Please reach out to me regarding this mater ST engineers or other folks that have experience with this problem. All advices are appreciated in advance.

Senior III

What is the impedance of an analog signal path? What is the frequency spectrum of the signal? Is there any analog filter used? Aren't digital signals routed around the analog path and are the principles of low-noise design of this path respected?

As you can see, there can be many causes and it is very difficult to advise without knowing the specific application. If it is no longer possible to change the connection, digital filtering of the signal is probably the only way.


> sample duration of 3.5 ADC clocks

I wouldn't expect a perfect reading with such a small sampling time.

General tips for improving ADC accuracy are here. You mention a few of them, but there are many others, including sampling time.

A few counts is within the ENOB values in the datasheet.



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Associate III

Thanks @ONadr.1 and @TDK for reaching out. At the moment there is no output filter used on the op-amp, only a lagging capacitor placed between non-inverting and inverting inputs of op-amp. The impedance of this signal is very low considering its the output of the op-amp. The digital signals are away from analog circuitry. I have just investigated to see what my VDD/VREF+ are experiencing and this is what I found:

100nF + 4.7uF.png

There is a 65.3 kHz ripple which comes from the switching frequency of the converter and its harmonics. However, there is a noticeable superimposed, relatively high amplitude noise at 500 kHz which is due to an external bias supply (flyback) switching. 
I might have to filter this out more, provided that the ripple is easily higher than 1 LSB (800 µV) of ADC. I am even considering of using a PI filter from VDD to VREF+, what are your thoughts on that? I could try filtering out at least higher frequencies with this method? 
Note: the signal spectrum is captured with 'hold max' method and limited to 20 MHz.

I would try to put an LC filter between VDD--VDDA. If the MCU package has the possibility to use an external Vref, then one more RC filter between VDDA--Vref (VDDA as reference) or capacitors (1uF+22nF ceramic) between Vref and analog groun (iternal ref as reference).

@ONadr.1 The problem with this chip is that it does not have a dedicated analog power supply pins. Sure, I will try RC and potentially LC from VDD to VREF+. 

Ah, I see it now. I should have looked at the datasheet earlier. But it never occurred to me that there is a 12bit AD converter in the MCU without a separate power supply. In that case, I'd probably choose a different MCU if possible. I'm afraid the filter won't help much here.