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I’m developing a motor driver that uses hall quadrature encoder on the motor shaft. I implemented the code described in a tutorial here… https://deepbluembedded.com/stm32-timer-encoder-mode-stm32-rotary-encoder-interfacing/The example runs fine with PF12 (TIM20_CH1) and PF13 (TIM20_CH2) connected to the quadrature signals.Except, if I assign User Labels M3_HALL_A and M3_HALL_B respectively, the initialization code is not properly created and the PF12 and PF13 remain in their reset configuration (pin mode analog MODER values are 0x03).Is there some extra step required if User Labels are assigned, or is this a bug to be fixed?Thank you.

I have used STM32CubeMX to change the prescalers in the STM32_WPAN section. However, the code itself never uses the new values. It appears that “something” has marked the RTC as already initialized and it won’t execute that code.How can I force my code to load the new values?Nite: The values that are being loaded came from when I enabled the BLE code, but it causes the RTC to run too slow.

I am looking at the datasheet and reference manual for the STM32H750. I am trying to learn about the connections between buses and I saw on the reference manual that AHB2 in the D2 domain has no master bus port, however the datasheet shows an AHB/APB bridge between buses labeled AHB2 and APB2. later in section 2.1.3 of the reference manual, there is no mention of an AHB2 to APB2 connection. What does this mean for accessing peripherals on the AHP2 peripheral bus, is it intended for AHB1 as per the reference manual, or through AHB2 as per the datasheet, or is there another way I am not seeing?Reference manual Diagram showing no AHB2 → APB2 connectionDatasheet Block Diagram showing APB2 connection to AHB2 through AHB/APB bus bridge (blue box) 

Page 31 of AN5093, AN2687 is mentioned while discussing crystals. AN2687 is about a LCD software driver. I believe they meant to mention AN2867 which is also mentioned earlier in the document.   

 Hello STM32 Community,I am currently working on a custom PCB designed using the STM32H7A3ZIT6Q (Cortex-M7) microcontroller. I am trying to program the MCU using an ST-LINK/V2 debugger through a Tag-Connect adapter, but STM32CubeProgrammer is unable to detect the target MCU.Hardware configuration: MCU: STM32H7A3ZIT6Q (SMPS variant) Programmer: ST-LINK/V2 Adapter: TC2050-ARM20-10 REV2 Programming cable: TC2050 PCB programming connector: TC2050-IDC-ND footprint External power supply: 3.3 V DC Target voltage reported by ST-LINK: 3.22 V Debug interface: SWD STM32CubeProgrammer settings: Port: SWD Frequency: 100 kHz Mode: Under Reset Reset Mode: Hardware Reset Access Port: 0 Speed: Reliable ST-LINK Firmware: V2J47S7 Error messages:Error: Unable to get core IDError: No STM32 target found!Troubleshooting performed: The ST-LINK/V2 is successfully detected by STM32CubeProgrammer. The programmer reports a target reference voltage of approximately 3.22 V. The PCB is

Hello,I am using NUCLEO-U5A5ZJ-Q evaluation board.I have configured ADC1 to do a single conversion and a software start.I want to measure ADC conversion time.My main test code looks like thiswhile(1){    HAL_ADC_Start_IT(&hadc1);            HAL_Delay(1);            HAL_ADC_Stop_IT(&hadc1);    adc_value = hadc1.Instance->DR;    }I have added a test pin for debugging. To check with oscilloscope.I set pin high inside HAL_ADC_Start_IT just before ADC enabled.And I reset pin inside interrupt procedure ADC1_2_IRQHandler.I have connected oscilloscope to ADC input pin directly to see sample begin. As ADC capacitor is connected to input and it has some chargeit is possible to see discharge curve on the screen.Here is the picture. Yellow shows time between start and end of sampling.Blue shows sampling begin (when capacitor is connected).Why there are two discharge curves?I have configured to do only one sample.Also the timing is wrong.I am using clock from external HSE.It is 16MHZ. Di

Hello,I have a STM32U585. I’m trying to use SAI to transmit and receive I2S audio as a slave. The I2S master is an external codec that’s configured for stereo 16bit 16kHz audio. Mic/input from codec->MCU and speaker/output from MCU->codec. The first stereo sample received on the codec is routed to the left speaker and second to the right. This works as expected for the mic. For the speakers, sometimes even samples will play on the right side and odd on the left. I’ve loaded the DMA buffer with dummy values 0xAAAA and 0x0000 to demonstrate. MISO is the signal of interest here. I’d like 0xAAAA to be on Ch 1 consistently.Expected SamplesUnexpected SamplesThis occurred about 50% of the time. It’s observable for the entire runtime and doesn’t correlate with how long the software has been running. I suspected a sync issue SAI/DMA so I implemented a quick hack to poll the GPIO to start the DMA transfer after the falling edge of WS to help sync. This improves reliability from 50% to 90%.

Hello, I am trying to interface Audio codec with stm32wba65 (using reference: GitHub - stm32-hotspot/STM32WBA-Advanced-BLE-Broadcast-Speaker: The BLE Speaker is a prototype for a portable Bluetooth® Low Energy speaker supporting broadcast sink, scan delegator role and optionally unicast server role · GitHub ) , there is an additional MCU between STM32WB55 and Audio codec but i am thinking to use the audio codec directly over SAI1. as SAI1 has 2 blocks SAIA and SAI B. Is it possible to interface audio codec via one block (SAI A) and any other MIC (I2S or PDM) another block (SAIB) ? can someone please tell if it is possible .If yes can plz provide ioc settings.? what things to be take into care?Regards,D

Hello,I want to implement HOGP (BLE HID) on an STM32WBA23KE so that it can connect to Windows 11.I implemented it using the BLE_HID_Mouse sample for STM32WBA55G-DK1 as a reference, but Windows 11 does not recognize it as an HID device (it seems to be failing in some procedure after the Bluetooth connection). I checked the GATT service configuration by connecting with a smartphone app, and there seem to be no particular problems (although I cannot read the Report Map or HID Information due to BLUETOOTH_PRIVILEGED).With the STM32WBA55G-DK1, I have confirmed that it can connect to Windows 11 as an HID device and behaves like a mouse.I have attached the main source files and .ioc file of the STM32WBA23KE project.Are there any possible causes?Best regards, Gotoda 

Cubemx2 only allots enough buffer descriptor table space for 4 endpoints. When a 5th endpoint is added, the table will overlap with the data buffer. In the following generated code, address should be starting at 0x28 and not 0x20. HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x0, HAL_PCD_SNG_BUF, 0x20); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x80, HAL_PCD_SNG_BUF, 0x60); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x81, HAL_PCD_SNG_BUF, 0xA0); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x82, HAL_PCD_SNG_BUF, 0xE0); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x3, HAL_PCD_SNG_BUF, 0x120); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x83, HAL_PCD_SNG_BUF, 0x160); HAL_PCD_PMAConfig(&hUSB_DRD_FS_PCD, 0x4, HAL_PCD_SNG_BUF, 0x1A0); 

Hello ST Support,I am using the NUCLEO-H533RE board and would like to clarify whether the STM32H533 supports hardware-accelerated SHA-3, particularly SHA3-256.I noticed an inconsistency in the documentation:The product page and datasheet feature summary list “HASH (SHA-1, SHA-2, SHA-3)”. Section 3.30 — HASH hardware accelerator of datasheet DS14539 Rev 3 describes SHA-1/SHA-2 algorithms but does not mention SHA-3. I could not find a SHA-3 operating mode in RM0481, or a corresponding algorithm selector/API in the STM32CubeH5 HAL version installed in my project.Could you please confirm:Does the STM32H533RET6 physically support hardware-accelerated SHA3-256? If so, which registers, HAL APIs, and STM32CubeH5 version should be used? Is an example available?Thank you for your clarification. 

I have many timers working on out H743VIT6 board, so only have Tim2, 5, 12 and above available.I have many forms of of timer triggered DMA working, but in this case as the system is near to max capacity, I need a DMA event scheduled for 52uS in the future WITHOUT using IRQs which are not time-stable enough for the purpose.So I found that timer 16 in table 98 of the RM0433 manual is show connecting to timer 2, but in CubeMX timer 15 shows no trigger source!So I though I would set up timer 5 to count down 52uS and trigger its DMA stream to write a half word to CR1 of Timer 15, that was setup to pace its own DMA stream.  Now I can get tier 15 triggering and DMA transfering it I enable it via the end of event cllback for timer 5, but DMAing to CR1 of an diabled timer doesn’t seem to work.It’s a very complicated problem! // Arm one amplitude bank, started by a TIM5 countdown delay to trigger DMA write to enable a target timer with DMA streamHAL_StatusTypeDef ArmOneBank(uint32_t *pwm_values,

Subject: STM32F373CCT6 SDADC: Wrong Readings with VDDA Reference on One Board After Environmental TestingHello ST Support Team,We use the STM32F373CCT6 to read four analog inputs with SDADC1 and SDADC2. One of our boards developed a problem during environmental testing (temperature change, dry heat, cold, damp heat cyclic and steady state), where it ran in full-function mode throughout.What happenedThe board worked correctly until day 2 of the damp heat steady-state test (40 °C). Then all four channels read with an offset (for example, a 100 V input read as 50 V). After a power cycle it worked for 2 to 3 hours, then read full scale (3.3 V) even with no input. Reflashing the firmware did not help.A couple of days later we debugged it with the same firmware (internal VDDA reference). With no input, each channel should read 1.65 V (confirmed with a multimeter at the MCU pin), but the firmware reads 1.85 V on all four channels. With the reference set to internal 1.8 V, the readings are cor

We are using STM32G0B1CEU6N to implement two PD sink ports. USB is not used. We also need IOs with 1.8V and 3.3V levels. Device datasheet states in Table 81 that UCPD requires VDD to be 3.0-3.6V in sink applications. All UCPD CC pins are in VDDIO2 bank. Does UCPD require VDD to be 3.0V or is it really powered from VDDIO2? What voltage level is required on VDDIO2 to support UCPD CC pins?

Windows 11 version 22H2 (OS Build 22621.6060)Visual Studio Code v1.141.0STM32CubeIDE for Visual Studio Code V3.11.0STM32CubeMX v6.18.1STMCUFinder v6.0.0I have configured the executable path below via File > Preferences > Settings below: Already created settings.json below, {  "stm32cube-ide-core.configuration.productSTM32CubeMX.executablePath": "C:/STMicroelectronics/STM32CubeMX/STM32CubeMX.exe",  "stm32cube-ide-core.configuration.productFinder.executablePath": "C:/Program Files/STMicroelectronics/STMCUFinder/STMCUFinder.exe"}When click on “Launch STM32CubeMX”, nothing shown up.However, I can run the STM32CubeMX externally from Windows​​​ (not from VSCode).Later, I found the solution that CAN Launch STM32CubeMX, that is previously I have set the STM32CubeMX.exe to run as Administrator, so:- remove the administrator elevation from STM32CubeMX.exe- remove the settings.jsonThen clicking the “Launch STM32CubeMX”, the STM32CubeMX is running fine already the same time you are able to l

Hello,I am looking for a camera module for the NUCLEO-H7S3L8 board, using the STM32H7S3L8 MCU.My project requirements are: Field of view: at least 120° horizontal FOV Preferably RGB or YCbCr output I would prefer a module that is reasonably easy to connect, with a breakout board or pin header I would like to avoid MIPI CSI-2 cameras because the NUCLEO-H7S3L8 does not have a CSI-2 camera receiver or a 22-pin camera connector The STM32H7S3L8 datasheet, Section 3.26, states that its DCMIPP supports an 8- to 16-bit parallel camera interface, including RGB565, YCbCr 4:2:2 and compressed data such as JPEG. However, the NUCLEO-H7S3L8 board does not appear to have a dedicated camera FPC connector.I found an ST Community table listing OV2640, OV5640 and OV5642 as examples of sensors supported by STM32 DCMI. I am therefore considering an OV5640 module with a 120° lens, such as this module:https://www.eleparts.co.kr/goods/view?no=6210776&utm_ I also considered an Arducam Mega SPI camera

Hello,I am working with an STM32N657 on the NUCLEO-N657X0-Q and I am trying to use the Ethernet PTP PPS signal as a hardware start trigger for TIM3.TIM3 is configured as follows: HAL_TIMEx_TISelection(&htim3, TIM_TIM3_TI1_ETH1_PPS, TIM_CHANNEL_1);sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;sSlaveConfig.TriggerPolarity = TIM_TRIGGERPOLARITY_RISING;sSlaveConfig.TriggerPrescaler = TIM_TRIGGERPRESCALER_DIV1;sSlaveConfig.TriggerFilter = 0;HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig);TIM3 itself uses an external clock on ETR2 and should only be enabled by the rising edge of ETH1_PPS.The internal connection works correctly when I use the normal/fixed PPS mode.For example: ETH1->MACPPSCR = 1U;In this case the PPS rising edge reaches TIM3, TIM3->CR1.CEN becomes set, TIM3 starts counting and the rest of my application starts correctly.However, I cannot get the same internal connection to

Hello,on a shared SPI bus (one master, several slaves, one NSS line per slave, the "Standard multislave communication" topology of RM0456 §68.4.5), an STM32U5 SPI slave with hardware NSS sometimes ends a transaction early. EOT is raised 112 or 126 bytes (frames) before TSIZE, with no UDR, OVR, MODF or FRE flag. The slave then stops driving MISO, so the master receives the last ~110 bytes as 0x00, while on the slave the HAL reports a normal "transfer complete". The data corruption is silent.When it happensEach slave prepares its next transfer on its own, with HAL_SPI_TransmitReceive_DMA, which sets SPE as its last step, and then raises a "ready" GPIO for the master. So the call sometimes falls while the master is clocking another slave: this slave's NSS is high and SCK is toggling. That is the only case in which the failure appears.With only one slave active (no foreign traffic on SCK) it never happens. It is the instant SPE is set that matters, not the DMA setup. Our workaround: prepar

When using I2C peripherals with an STM32, occasional NACKs or communication timeouts can be difficult to diagnose.How do you usually approach debugging these issues? Do you start by checking the bus signals with a logic analyser, reviewing the timing configuration, or inspecting the firmware error handling?I'd be interested in hearing which debugging techniques have been most useful in practice.

  I am integrating the STSAFE-A110 as a secure element with the STM32H523 as the host MCU. I am using the latest version of the X-CUBE-STSE01 middleware and want to establish and use a secure channel between the secure element and the host. Using the Host Key Provisioning example provided in X-CUBE-STSE01, I provisioned the Host MAC and Host Cipher keys into the secure element. I want to store 12 bytes of data in data partition index 2 during provisioning and read the data back during runtime in the host environment. Currently, I can successfully store and read the data using the following APIs with STSE_NO_PROT:             stse_data_storage_update_data_zone()            stse_data_storage_read_data_zone() However, I want to perform these operations using STSE_HOST_C_MAC_R_MAC, as this is the Host Session protection mode supported by X-CUBE-STSE01. On one board, I receive the STSE_INVALID_C_MAC error. I provisioned the keys on another board, but on that board, I receive the STS

Hello ST team,I am using MCSDK 6.4.1 with a custom STM32G431CBUx inverter board. My external ESC PWM signal is physically connected to PB10.As shown in the two attached images:1. Motor Control Workbench shows PWM_ESC_INPUT on PB10 / TIM2_CH3.2. After code generation, STM32CubeMX shows M1_PWM_INPUT on PA15, while PB10 is unconfigured.Why does the generated configuration differ from the Workbench setting? Is this a known limitation or a configuration issue?How can I use PB10 / TIM2_CH3 with the native MCSDK ESC functionality?Thank you.  

Hello,Our STM32N657 appears to be revision B. We use a battery-powered board with an STM6601 power-button controller. The MCU asserts PSHOLD early in the FSBL to keep power enabled.ES0620, section 2.2.18 specifies setting SYSCFG_CM55RSTCR.CORE_RESET_TYPE, followed by a software reset (NVIC_SystemReset()), after the first power-on reset.That additional reset conflicts with our power-hold arrangement.Is the initial software reset strictly required for the NRST workaround, or can we set CORE_RESET_TYPE and continue booting? If it is mandatory, is there a supported alternative that avoids this extra reset?Thanks!

Hello,I am currently developing a USB Device application using the STM32N657L0.I am reaching out to ask for advice because I am having difficulty meeting the target power consumption requirement of 5V, 2mA max during USB Suspend state. Our target conditions and system requirements are as follows:VDDCORE uses an external power supply. The USB Driver must be maintained during USB Suspend. The system must be able to wake up and recover via USB. Power consumption must remain below 5V, 2mA during USB Suspend.Currently, when the chip is configured in STOP Mode, the measured power consumption is:VDDA18AON (1.8V): ~5mA VDDCORE (0.81V): ~40mA We are looking for ways to further reduce these currents to meet the 2mA requirement.Could you please guide us on how to optimize the power modes, clock gating, or power supply configurations to achieve this? Any suggestions or reference guidelines would be greatly appreciated.Thank you for your support.Best regards,

Can the VNL5050N3-E operate reliably with a 3.3V Input logic signal while switching a load of maximum 2A?

Hello guys  I am working on a switch mode power supply with PFC  and for the latter I have picked L4984D IC.  The reference circuit design I obtained with the help of eDesignSuite online tool.   Upon assembly of the circuit, as a safety measure , I powered it through a series bulb and straight away, things did not look promising. there were no shorts, but the voltage at the INV pin measured at 0.7v , which according to the datasheet ,told me that there was a feedback failure. After inspecting all the feedback resistors and double checking the circuit, I discovered that VCC voltage was dropping below VCCON. rectified it and then Series Bulb light up brighter than before and had a pulsating visuals( not completely dimming). did more checking and found out that the main bulk voltage was dropping to 110V , which is far too low and now the only suspect seemed to be the series bulb. before bypassing it, I did one final measurements to make sure it was safe to directly turn the circuit and th