STM32F373CCT6 SDADC: Incorrect Readings with Internal VDDA Reference on One Board After Environmental Testing
Subject: STM32F373CCT6 SDADC: Wrong Readings with VDDA Reference on One Board After Environmental Testing
Hello ST Support Team,
We use the STM32F373CCT6 to read four analog inputs with SDADC1 and SDADC2. One of our boards developed a problem during environmental testing (temperature change, dry heat, cold, damp heat cyclic and steady state), where it ran in full-function mode throughout.
What happened
The board worked correctly until day 2 of the damp heat steady-state test (40 °C). Then all four channels read with an offset (for example, a 100 V input read as 50 V). After a power cycle it worked for 2 to 3 hours, then read full scale (3.3 V) even with no input. Reflashing the firmware did not help.
A couple of days later we debugged it with the same firmware (internal VDDA reference). With no input, each channel should read 1.65 V (confirmed with a multimeter at the MCU pin), but the firmware reads 1.85 V on all four channels. With the reference set to internal 1.8 V, the readings are correct.
Configuration
- Single-ended offset mode, gain 0.5
- MCU clock 72 MHz, SDADC clock 1.5 MHz
- VDDA (pin 9) and VDDSD (pin 24): 3.3 V
- Formula:
voltage = (float)raw_value * (SDADC_VREF_VOLTAGE / 32768);
Questions
- What could cause wrong readings with the VDDA reference while the internal 1.8 V reference reads correctly?
- Can you share the SDADC internal architecture (especially the VDDA connection to the reference path) or a document to help us debug this?
- Please advise on a solution.
Thank you for your support.
Best regards,
MADHAVARAJA RS
ILLUMINEN TECHNOLOGIES
