STM32N657: ETH1_PPS internal connection to TIM3 works with fixed PPS but not with Flexible PPS

[FORVIA]

Hello,

I am working with an STM32N657 on the NUCLEO-N657X0-Q and I am trying to use the Ethernet PTP PPS signal as a hardware start trigger for TIM3.

TIM3 is configured as follows:

HAL_TIMEx_TISelection(&htim3,
                      TIM_TIM3_TI1_ETH1_PPS,
                      TIM_CHANNEL_1);

sSlaveConfig.SlaveMode = TIM_SLAVEMODE_TRIGGER;
sSlaveConfig.InputTrigger = TIM_TS_TI1FP1;
sSlaveConfig.TriggerPolarity = TIM_TRIGGERPOLARITY_RISING;
sSlaveConfig.TriggerPrescaler = TIM_TRIGGERPRESCALER_DIV1;
sSlaveConfig.TriggerFilter = 0;

HAL_TIM_SlaveConfigSynchro(&htim3, &sSlaveConfig);

TIM3 itself uses an external clock on ETR2 and should only be enabled by the rising edge of ETH1_PPS.

The internal connection works correctly when I use the normal/fixed PPS mode.

For example:

ETH1->MACPPSCR = 1U;

In this case the PPS rising edge reaches TIM3, TIM3->CR1.CEN becomes set, TIM3 starts counting and the rest of my application starts correctly.

However, I cannot get the same internal connection to work when using Flexible PPS.

For Flexible PPS0 I tested:

ETH1->MACPPSTTS0R = target_seconds;
ETH1->MACPPSTTN0R = target_nanoseconds;

ETH1->MACPPSI0R = 99999999U;  /* 1 s period */
ETH1->MACPPSW0R = 49999999U;  /* 50 % duty cycle */

ETH1->MACPPSCR = 0x52U;

where:

TRGTMODSEL0 = 2
PPSEN0      = 1
PPSCMD0     = 2 (start pulse train)

The Flexible PPS generator itself appears to work correctly:

• MACPPSCR changes from 0x52 to 0x50, so the PPS command is accepted and self-cleared.
• MACTSSR.TSTARGT0 is set when the programmed target time is reached.
• MACTSCR = 0x203.
• The Flexible PPS signal can be measured externally on PF3 / ETH1_PPS_OUT.
• On PF3 I see exactly the programmed signal: 1 second period, 50 % duty cycle.

Nevertheless, TIM3 does not see this Flexible PPS signal through the internal ETH1_PPS -> TIM3_TI1 connection.

After the target time has passed:

TIM3->CR1 = 0
TIM3->CNT = 5119

so TIM3 is still waiting for its trigger.

The important observation is therefore:

Fixed PPS:
ETH1 PPS -> internal TIM3_TI1 -> works

Flexible PPS:
ETH1 PPS_OUT on PF3 -> works
ETH1 PPS -> internal TIM3_TI1 -> does not work

The Ethernet hardware feature register is:

MACHWF2R = 0x42041041

so Flexible PPS outputs are implemented in the MAC.

My questions are:

1. Is TIM_TIM3_TI1_ETH1_PPS internally connected only to the fixed PPS generator, and not to the Flexible PPS0 output?
2. Should Flexible PPS0 normally be visible on this internal ETH1_PPS-to-TIM3 connection?
3. Is there another mux/register configuration required to route Flexible PPS internally to TIM3?
4. Is this a known STM32N6 limitation/erratum, or is this internal PTP routing not yet fully documented in the reference manual?

As a workaround I could route ETH1_PPS_OUT externally from PF3 to a physical TIM3_CH1 pin, but I would prefer to use the internal connection if Flexible PPS is supposed to be supported.

Thank you for any clarification.