STM32N657 revision B: NRST workaround without an initial software reset?

[northh_sven]

Hello,

Our STM32N657 appears to be revision B. We use a battery-powered board with an STM6601 power-button controller. The MCU asserts PSHOLD early in the FSBL to keep power enabled.

ES0620, section 2.2.18 specifies setting SYSCFG_CM55RSTCR.CORE_RESET_TYPE, followed by a software reset (NVIC_SystemReset()), after the first power-on reset.

That additional reset conflicts with our power-hold arrangement.

Is the initial software reset strictly required for the NRST workaround, or can we set CORE_RESET_TYPE and continue booting? If it is mandatory, is there a supported alternative that avoids this extra reset?

Thanks!

[mƎALLEm]

Hello,

I’m forwarding your question internally to our team over this internal ticket: CDM0066668 (not accessible by the community users).

I’ll get back to you as soon as I get an answer.