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northh_sven
Associate II
Oct 6, 2026 7:52 AM UTC
Solved

STM32N657 revision B: NRST workaround without an initial software reset?

Hello,

Our STM32N657 appears to be revision B. We use a battery-powered board with an STM6601 power-button controller. The MCU asserts PSHOLD early in the FSBL to keep power enabled.

ES0620, section 2.2.18 specifies setting SYSCFG_CM55RSTCR.CORE_RESET_TYPE, followed by a software reset (NVIC_SystemReset()), after the first power-on reset.

That additional reset conflicts with our power-hold arrangement.

Is the initial software reset strictly required for the NRST workaround, or can we set CORE_RESET_TYPE and continue booting? If it is mandatory, is there a supported alternative that avoids this extra reset?

Thanks!

mƎALLEm
mƎALLEmBest answer
ST Technical Moderator
Oct 26, 2026 11:20 AM UTC

Hello ​@northh_sven ,

This is a feedback from the expert:

For revision B devices, the workaround described in Errata ES0620 section 2.2.18 is intended to ensure that the reset circuitry is correctly configured before any subsequent assertion of the NRST pin.

The initial software reset is not necessarily required immediately after the first power-on if the application can guarantee that the workaround will be applied before any external NRST event occurs. In practice, the application may:

  1. Configure SYSCFG_CM55RSTCR.CORE_RESET_TYPE to select the Power-On Reset behavior.
  2. Detect an upcoming reset request at the application level.
  3. Execute the final part of the workaround by issuing NVIC_SystemReset()  before the external reset is expected.

This software reset updates the internal reset circuitry configuration and ensures that subsequent NRST assertions operate as intended.

If the workaround is not applied before an NRST event occurs, there is a risk that the reset circuitry will be affected by the erratum and the device may not reset correctly. Based on internal observations, the occurrence rate is typically below 10%; however, this figure is provided for information only and is not guaranteed.

At present, there is no supported alternative that completely avoids the software reset requirement on revision B devices. The only definitive solution is to use a device revision in which this erratum has been corrected.

To better assess the impact on your design, could you please clarify the current status of your project (evaluation, development, validation, or production phase)?

To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.

4 replies

mƎALLEm
ST Technical Moderator
Oct 16, 2026 11:38 AM UTC

Hello,

I’m forwarding your question internally to our team over this internal ticket: CDM0066668 (not accessible by the community users).

I’ll get back to you as soon as I get an answer.

To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.
mƎALLEm
mƎALLEmBest answer
ST Technical Moderator
Oct 26, 2026 11:20 AM UTC

Hello ​@northh_sven ,

This is a feedback from the expert:

For revision B devices, the workaround described in Errata ES0620 section 2.2.18 is intended to ensure that the reset circuitry is correctly configured before any subsequent assertion of the NRST pin.

The initial software reset is not necessarily required immediately after the first power-on if the application can guarantee that the workaround will be applied before any external NRST event occurs. In practice, the application may:

  1. Configure SYSCFG_CM55RSTCR.CORE_RESET_TYPE to select the Power-On Reset behavior.
  2. Detect an upcoming reset request at the application level.
  3. Execute the final part of the workaround by issuing NVIC_SystemReset()  before the external reset is expected.

This software reset updates the internal reset circuitry configuration and ensures that subsequent NRST assertions operate as intended.

If the workaround is not applied before an NRST event occurs, there is a risk that the reset circuitry will be affected by the erratum and the device may not reset correctly. Based on internal observations, the occurrence rate is typically below 10%; however, this figure is provided for information only and is not guaranteed.

At present, there is no supported alternative that completely avoids the software reset requirement on revision B devices. The only definitive solution is to use a device revision in which this erratum has been corrected.

To better assess the impact on your design, could you please clarify the current status of your project (evaluation, development, validation, or production phase)?

To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.
northh_sven
Associate II
Oct 26, 2026 11:51 AM UTC

Hello mƎALLEm,

thank you for getting back to me. We are finishing up validation right now. So we will either have to work around this in software or use another revision chip.
The errata document mentions revision X is not affected, can you give information on its availability? Especially for the VFBGA264 package?

Thanks!

mƎALLEm
ST Technical Moderator
Oct 26, 2026 11:54 AM UTC

Hello,

The errata document mentions revision X is not affected, can you give information on its availability?

Unfortunately, I don’t have any information about the availability.  

For a such a question, please ask your local distributor or FAE.

To give better visibility on the answered topics, please click "Best answer" on the reply which solved your issue or answered your question.