2022-09-29 03:18 PM
Hi all -
I'm modifying some legacy code written for a WICED device that contains an STM32F2xx. The original programmer had a passage that reduces down to:
#define OB_RDP_Level_0 ((uint8_t)0xAA)
#define OB_RDP_Level_1 ((uint8_t)0x55)
FLASH_OB_Unlock();
FLASH_OB_RDPConfig( OB_RDP_Level_1 );
FLASH_OB_Launch();
FLASH_OB_Lock();
NVIC_SystemReset( );
I have no idea where he got the value "55" but the upshot is I can't reset my OBs. When I try, I get this output from the programmer software:
15:15:33 : Option byte command : -ob RDP=170
15:15:33 : PROGRAMMING OPTION BYTES AREA ...
15:15:33 : Bank : 0x00
15:15:33 : Address : 0x40023c14
15:15:33 : Size : 12 Bytes
15:15:52 : UPLOADING OPTION BYTES DATA ...
15:15:52 : Bank : 0x00
15:15:52 : Address : 0x40023c14
15:15:52 : Size : 12 Bytes
15:15:52 : Error: Uploading Option Bytes bank: 0 failed
15:15:52 : Error: Reloading Option Bytes Data failed
15:15:52 : Time elapsed during option Bytes configuration: 00:00:18.761
15:15:52 : Error: Unable to get core ID
15:15:52 : Error: Unable to get core ID
15:15:52 : Warning: Connection to device 0x411 is lost
15:15:52 : Disconnected from device.
So, my questions are:
Thanks for any assistance...
2022-09-29 04:05 PM
1) What exactly is not clear from the description in reference manual?
0xAA: Level 0, no protection
0xCC: Level 2, chip protection (debug and boot from RAM features disabled)
Others: Level 1, read protection of memories (debug features limited)
2) Probably try SWD interface with a "connect under reset".
2022-09-29 04:15 PM
Hi Pirahna - thanks for the reply. What's wasn't clear to me is whether a value of 55 might have been interpreted as a CC, which (from my understanding) is a one way trip. I guess the passage from the reference manual you cited suggests not.
These are the settings I've used...thanks.